/external/llvm/lib/Target/CellSPU/ |
D | SPUSubtarget.h | 42 InstrItineraryData InstrItins; variable
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D | SPUTargetMachine.h | 36 InstrItineraryData InstrItins; variable
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonTargetMachine.h | 36 const InstrItineraryData* InstrItins; variable
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D | HexagonSubtarget.h | 39 InstrItineraryData InstrItins; variable
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/external/llvm/lib/Target/PowerPC/ |
D | PPCTargetMachine.h | 38 InstrItineraryData InstrItins; variable
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D | PPCSubtarget.h | 58 InstrItineraryData InstrItins; variable
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | ScheduleDAGSDNodes.h | 40 const InstrItineraryData *InstrItins; variable
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/external/llvm/lib/Target/MBlaze/ |
D | MBlazeSubtarget.h | 39 InstrItineraryData InstrItins; variable
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D | MBlazeTargetMachine.h | 41 InstrItineraryData InstrItins; variable
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/external/llvm/include/llvm/CodeGen/ |
D | DFAPacketizer.h | 45 const InstrItineraryData *InstrItins; variable
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D | ResourcePriorityQueue.h | 63 const InstrItineraryData* InstrItins; variable
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D | ScheduleDAGInstrs.h | 172 const InstrItineraryData *InstrItins; variable
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/external/llvm/lib/Target/ARM/ |
D | ARMTargetMachine.h | 39 InstrItineraryData InstrItins; variable
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D | ARMSubtarget.h | 159 InstrItineraryData InstrItins; variable
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/external/llvm/lib/Target/X86/ |
D | X86TargetMachine.h | 37 InstrItineraryData InstrItins; variable
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D | X86Subtarget.h | 154 InstrItineraryData InstrItins; variable
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/external/llvm/lib/Target/Mips/ |
D | MipsSubtarget.h | 89 InstrItineraryData InstrItins; variable
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/external/llvm/lib/CodeGen/ |
D | PostRASchedulerList.cpp | 206 const InstrItineraryData *InstrItins = TM.getInstrItineraryData(); in SchedulePostRATDList() local
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D | MachineLICM.cpp | 69 const InstrItineraryData *InstrItins; member in __anona258b3540111::MachineLICM
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D | IfConversion.cpp | 156 const InstrItineraryData *InstrItins; member in __anon9e5b2ccf0111::IfConverter
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D | TwoAddressInstructionPass.cpp | 67 const InstrItineraryData *InstrItins; member in __anona0f96b930111::TwoAddressInstructionPass
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