/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAGInfo.h | 59 SDValue Op1, SDValue Op2, in EmitTargetCodeForMemcpy() 76 SDValue Op1, SDValue Op2, in EmitTargetCodeForMemmove() 92 SDValue Op1, SDValue Op2, in EmitTargetCodeForMemset()
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/external/llvm/lib/Target/X86/AsmParser/ |
D | X86AsmParser.cpp | 1100 X86Operand &Op2 = *(X86Operand*)Operands.begin()[2]; in ParseInstruction() local 1113 X86Operand &Op2 = *(X86Operand*)Operands.begin()[2]; in ParseInstruction() local 1127 X86Operand &Op2 = *(X86Operand*)Operands.begin()[2]; in ParseInstruction() local 1140 X86Operand *Op2 = static_cast<X86Operand*>(Operands[2]); in ParseInstruction() local 1170 X86Operand *Op2 = static_cast<X86Operand*>(Operands[2]); in ParseInstruction() local
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/external/llvm/lib/Target/PTX/InstPrinter/ |
D | PTXInstPrinter.cpp | 201 const MCOperand &Op2 = MI->getOperand(OpNo+1); in printMemOperand() local
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonPeephole.cpp | 241 MachineOperand Op2 = MI->getOperand(S2); in runOnMachineFunction() local
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 271 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, in getSetCCOrOperation() 295 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, in getSetCCAndOperation() 735 SDValue Op1, SDValue Op2, in FindModifiedNodeSlot() 4705 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { in UpdateNodeOperands() 4734 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { in UpdateNodeOperands() 4740 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, in UpdateNodeOperands() 4747 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, in UpdateNodeOperands() 4819 SDValue Op2) { in SelectNodeTo() 4827 SDValue Op2, SDValue Op3) { in SelectNodeTo() 4877 SDValue Op1, SDValue Op2) { in SelectNodeTo() [all …]
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D | LegalizeVectorOps.cpp | 395 SDValue Op2 = Op.getOperand(2); in ExpandVSELECT() local
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D | SelectionDAGBuilder.cpp | 1882 SDValue Op2 = DAG.getNode(ISD::EHSELECTION, getCurDebugLoc(), VTs, Ops, 2); in visitLandingPad() local 2570 SDValue Op2 = getValue(I.getOperand(1)); in visitFSub() local 2581 SDValue Op2 = getValue(I.getOperand(1)); in visitBinary() local 2588 SDValue Op2 = getValue(I.getOperand(1)); in visitShift() local 2620 SDValue Op2 = getValue(I.getOperand(1)); in visitSDiv() local 2641 SDValue Op2 = getValue(I.getOperand(1)); in visitICmp() local 2655 SDValue Op2 = getValue(I.getOperand(1)); in visitFCmp() local 4508 SDValue Op2 = getValue(I.getArgOperand(1)); in visitIntrinsicCall() local 4524 SDValue Op2 = getValue(I.getArgOperand(1)); in visitIntrinsicCall() local 4541 SDValue Op2 = getValue(I.getArgOperand(1)); in visitIntrinsicCall() local [all …]
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D | LegalizeIntegerTypes.cpp | 181 SDValue Op2 = GetPromotedInteger(N->getOperand(2)); in PromoteIntRes_Atomic1() local 194 SDValue Op2 = GetPromotedInteger(N->getOperand(2)); in PromoteIntRes_Atomic2() local 849 SDValue Op2 = GetPromotedInteger(N->getOperand(2)); in PromoteIntOp_ATOMIC_STORE() local 1409 unsigned Op1, Op2; in ExpandShiftWithKnownAmountBit() local
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D | FastISel.cpp | 1200 unsigned Op2, bool Op2IsKill) { in FastEmitInst_rrr()
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D | TargetLowering.cpp | 3255 SDValue TargetLowering::BuildExactSDIV(SDValue Op1, SDValue Op2, DebugLoc dl, in BuildExactSDIV()
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/external/llvm/lib/Target/PTX/ |
D | PTXISelLowering.cpp | 158 SDValue Op2 = Op.getOperand(2); in LowerSETCC() local
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D | PTXInstrInfo.cpp | 327 DebugLoc dl, EVT VT, SDValue Op1, SDValue Op2) { in GetPTXMachineNode()
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/external/llvm/lib/Analysis/ |
D | ConstantFolding.cpp | 1348 if (ConstantFP *Op2 = dyn_cast<ConstantFP>(Operands[1])) { in ConstantFoldCall() local 1381 if (ConstantInt *Op2 = dyn_cast<ConstantInt>(Operands[1])) { in ConstantFoldCall() local
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/external/llvm/lib/Bitcode/Reader/ |
D | BitcodeReader.cpp | 1250 Constant *Op2 = ValueList.getConstantFwdRef(Record[2], Type::getInt32Ty(Context)); in ParseConstants() local 1262 Constant *Op2 = ValueList.getConstantFwdRef(Record[2], ShufTy); in ParseConstants() local 1276 Constant *Op2 = ValueList.getConstantFwdRef(Record[3], ShufTy); in ParseConstants() local
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/external/llvm/lib/AsmParser/ |
D | LLParser.cpp | 3051 BasicBlock *Op1, *Op2; in ParseBr() local 3376 Value *Op0, *Op1, *Op2; in ParseSelect() local 3430 Value *Op0, *Op1, *Op2; in ParseInsertElement() local 3449 Value *Op0, *Op1, *Op2; in ParseShuffleVector() local
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/external/llvm/lib/CodeGen/ |
D | ScheduleDAGInstrs.cpp | 776 unsigned Op2 = DefMI->findRegisterDefOperandIdx(Reg, false, true, TRI); in computeOperandLatency() local
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D | RegisterCoalescer.cpp | 633 unsigned Op1, Op2, NewDstIdx; in RemoveCopyByCommutingDef() local
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/external/llvm/lib/Transforms/InstCombine/ |
D | InstCombineCompares.cpp | 2224 Value *Op1 = 0, *Op2 = 0; in visitICmpInst() local 2934 Value *Op1 = 0, *Op2 = 0; in visitFCmpInst() local
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/external/llvm/lib/Target/ARM/ |
D | ARMFastISel.cpp | 342 unsigned Op2, bool Op2IsKill) { in FastEmitInst_rrr() 1799 unsigned Op2 = getRegForValue(I->getOperand(1)); in SelectBinaryFPOp() local
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/external/llvm/lib/Target/X86/ |
D | X86FastISel.cpp | 1470 const Value *Op2 = I.getArgOperand(1); in X86VisitIntrinsicCall() local
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D | X86ISelDAGToDAG.cpp | 2514 SDValue Op0, Op1, Op2, Op3, Op4; in SelectInlineAsmMemoryOperand() local
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D | X86ISelLowering.cpp | 8550 SDValue Op2 = Op.getOperand(2); in LowerSELECT() local 10626 unsigned Op2 = cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue(); in LowerMEMBARRIER() local
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/external/llvm/lib/Transforms/Scalar/ |
D | SimplifyLibCalls.cpp | 880 Value *Op1 = CI->getArgOperand(0), *Op2 = CI->getArgOperand(1); in CallOptimizer() local
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/external/llvm/lib/VMCore/ |
D | Instructions.cpp | 61 const char *SelectInst::areInvalidOperands(Value *Op0, Value *Op1, Value *Op2) { in areInvalidOperands()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 3974 SDValue Op2, SelectionDAG &DAG, in BuildIntrinsicOp()
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