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Searched defs:Opc (Results 1 – 25 of 82) sorted by relevance

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/external/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h323 bool isUncondBranchOpcode(int Opc) { in isUncondBranchOpcode()
328 bool isCondBranchOpcode(int Opc) { in isCondBranchOpcode()
333 bool isJumpTableBranchOpcode(int Opc) { in isJumpTableBranchOpcode()
339 bool isIndirectBranchOpcode(int Opc) { in isIndirectBranchOpcode()
DARMISelDAGToDAG.cpp120 SDValue &Opc) { in SelectAddrMode2Base()
125 SDValue &Opc) { in SelectAddrMode2ShOp()
130 SDValue &Opc) { in SelectAddrMode2()
308 static bool isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) { in isOpcWithIntImmediate()
393 SDValue &Opc, in SelectImmShifterOperand()
417 SDValue &Opc, in SelectRegShifterOperand()
493 SDValue &Opc) { in SelectLdStSOReg()
593 SDValue &Opc) { in SelectAddrMode2Worker()
726 SDValue &Offset, SDValue &Opc) { in SelectAddrMode2OffsetReg()
762 SDValue &Offset, SDValue &Opc) { in SelectAddrMode2OffsetImmPre()
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DARMFastISel.cpp517 unsigned Opc; in ARMMaterializeFP() local
543 unsigned Opc = is64bit ? ARM::VLDRD : ARM::VLDRS; in ARMMaterializeFP() local
562 unsigned Opc = isThumb2 ? ARM::t2MOVi16 : ARM::MOVi16; in ARMMaterializeInt() local
576 unsigned Opc = isThumb2 ? ARM::t2MVNi : ARM::MVNi; in ARMMaterializeInt() local
630 unsigned Opc; in ARMMaterializeGV() local
664 unsigned Opc = (RelocM!=Reloc::PIC_) ? ARM::t2LDRpci : ARM::t2LDRpci_pic; in ARMMaterializeGV() local
732 unsigned Opc = isThumb2 ? ARM::t2ADDri : ARM::ADDri; in TargetMaterializeAlloca() local
916 unsigned Opc = isThumb2 ? ARM::t2ADDri : ARM::ADDri; in ARMSimplifyAddress() local
986 unsigned Opc; in ARMEmitLoad() local
1111 unsigned Opc = isThumb2 ? ARM::t2ANDri : ARM::ANDri; in ARMEmitStore() local
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DThumb1RegisterInfo.cpp128 int Opc = (isSub) ? ARM::tSUBrr : (isHigh ? ARM::tADDhirr : ARM::tADDrr); in emitThumbRegPlusImmInReg() local
142 static unsigned calcNumMI(int Opc, int ExtraOpc, unsigned Bytes, in calcNumMI()
181 int Opc = 0; in emitThumbRegPlusImmediate() local
327 unsigned Opc = Old->getOpcode(); in eliminateCallFramePseudoInstr() local
DARMLoadStoreOptimizer.cpp262 static bool isT2i32Load(unsigned Opc) { in isT2i32Load()
266 static bool isi32Load(unsigned Opc) { in isi32Load()
270 static bool isT2i32Store(unsigned Opc) { in isT2i32Store()
274 static bool isi32Store(unsigned Opc) { in isi32Store()
633 static unsigned getUpdatingLSMultipleOpcode(unsigned Opc, in getUpdatingLSMultipleOpcode()
795 static unsigned getPreIndexedLoadStoreOpcode(unsigned Opc, in getPreIndexedLoadStoreOpcode()
820 static unsigned getPostIndexedLoadStoreOpcode(unsigned Opc, in getPostIndexedLoadStoreOpcode()
1830 int Opc = MI->getOpcode(); in RescheduleLoadStoreInstrs() local
DThumb2InstrInfo.cpp226 unsigned Opc = 0; in emitT2RegPlusImmediate() local
610 unsigned Opc = MI->getOpcode(); in getITInstrPredicate() local
/external/llvm/lib/Target/Mips/
DMipsInstrInfo.cpp51 unsigned Opc = MI->getOpcode(); in isLoadFromStackSlot() local
76 unsigned Opc = MI->getOpcode(); in isStoreToStackSlot() local
106 unsigned Opc = 0, ZeroReg = 0; in copyPhysReg() local
190 unsigned Opc = 0; in storeRegToStackSlot() local
217 unsigned Opc = 0; in loadRegFromStackSlot() local
248 static unsigned GetAnalyzableBrOpc(unsigned Opc) { in GetAnalyzableBrOpc()
260 unsigned Mips::GetOppositeBranchOpc(unsigned Opc) in GetOppositeBranchOpc()
281 static void AnalyzeCondBr(const MachineInstr* Inst, unsigned Opc, in AnalyzeCondBr()
380 unsigned Opc = Cond[0].getImm(); in BuildCondBr() local
DMipsAnalyzeImmediate.h20 unsigned Opc, ImmOpnd; member
DMipsMCInstLower.cpp110 static void CreateMCInst(MCInst& Inst, unsigned Opc, const MCOperand& Opnd0, in CreateMCInst()
211 unsigned Opc = MI->getOpcode(); in LowerUnalignedLoadStore() local
DMipsISelDAGToDAG.cpp341 MipsDAGToDAGISel::SelectMULT(SDNode *N, unsigned Opc, DebugLoc dl, EVT Ty, in SelectMULT()
389 unsigned Opc = InFlag.getOpcode(); (void)Opc; in Select() local
/external/llvm/lib/Target/Hexagon/
DHexagonCFGOptimizer.cpp53 static bool IsConditionalBranch(int Opc) { in IsConditionalBranch()
59 static bool IsUnconditionalJump(int Opc) { in IsUnconditionalJump()
106 int Opc = MI->getOpcode(); in runOnMachineFunction() local
DHexagonExpandPredSpillCode.cpp76 int Opc = MI->getOpcode(); in runOnMachineFunction() local
DHexagonSplitTFRCondSets.cpp84 int Opc = MI->getOpcode(); in runOnMachineFunction() local
DHexagonInstrInfo.cpp477 const int Opc = MI->getOpcode(); in isPredicable() local
1020 getMatchingCondBranchOpcode(int Opc, bool invertPredicate) const { in getMatchingCondBranchOpcode()
1257 int Opc = MI->getOpcode(); in PredicateInstruction() local
/external/llvm/lib/Target/X86/
DX86InstrInfo.cpp1503 unsigned Opc = Orig->getOpcode(); in reMaterialize() local
1563 unsigned Opc = TM.getSubtarget<X86Subtarget>().is64Bit() in convertToThreeAddressWithLEA() local
1747 unsigned Opc = is64Bit ? X86::LEA64_32r : X86::LEA32r; in convertToThreeAddress() local
1783 unsigned Opc = MIOpc == X86::INC64r ? X86::LEA64r in convertToThreeAddress() local
1813 unsigned Opc = MIOpc == X86::DEC64r ? X86::LEA64r in convertToThreeAddress() local
1843 unsigned Opc; in convertToThreeAddress() local
1900 unsigned Opc = is64Bit ? X86::LEA64_32r : X86::LEA32r; in convertToThreeAddress() local
1948 unsigned Opc; in commuteInstruction() local
2017 unsigned Opc = 0; in commuteInstruction() local
2361 unsigned Opc = GetCondBranchFromCond(CC); in InsertBranch() local
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DX86FastISel.cpp179 unsigned Opc = 0; in X86FastEmitLoad() local
237 unsigned Opc = 0; in X86FastEmitStore() local
288 unsigned Opc = 0; in X86FastEmitStore() local
322 bool X86FastISel::X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, in X86FastEmitExtend()
538 unsigned Opc = 0; in X86SelectAddress() local
1222 unsigned Opc = 0; in X86SelectSelect() local
1492 unsigned Opc = X86::SETBr; in X86VisitIntrinsicCall() local
1921 unsigned Opc = ResVT == MVT::f32 ? X86::ST_Fp80m32 : X86::ST_Fp80m64; in DoSelectCall() local
1998 unsigned Opc = 0; in TargetMaterializeConstant() local
2106 unsigned Opc = Subtarget->is64Bit() ? X86::LEA64r : X86::LEA32r; in TargetMaterializeAlloca() local
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DX86FrameLowering.cpp107 unsigned Opc = MBBI->getOpcode(); in findDeadCallerSavedReg() local
152 unsigned Opc; in emitSPUpdate() local
209 unsigned Opc = PI->getOpcode(); in mergeSPUpdatesUp() local
239 unsigned Opc = NI->getOpcode(); in mergeSPUpdatesDown() local
271 unsigned Opc = PI->getOpcode(); in mergeSPUpdates() local
526 unsigned Opc = MI.getOpcode(); in getCompactUnwindEncoding() local
1016 unsigned Opc = PI->getOpcode(); in emitEpilogue() local
1049 unsigned Opc = Is64Bit ? X86::LEA64r : X86::LEA32r; in emitEpilogue() local
1196 unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r; in spillCalleeSavedRegisters() local
1257 unsigned Opc = STI.is64Bit() ? X86::POP64r : X86::POP32r; in restoreCalleeSavedRegisters() local
DX86RegisterInfo.cpp430 unsigned Opc = getADDriOpcode(Is64Bit, Amount); in eliminateCallFramePseudoInstr() local
451 unsigned Opc = getSUBriOpcode(Is64Bit, CalleeAmt); in eliminateCallFramePseudoInstr() local
486 unsigned Opc = MI.getOpcode(); in eliminateFrameIndex() local
/external/llvm/lib/Target/MBlaze/
DMBlazeISelDAGToDAG.cpp101 unsigned Opc = N->getOpcode(); in isIntS32Immediate() local
213 unsigned Opc = MBlaze::ADDIK; in Select() local
DMBlazeInstrInfo.h144 inline static bool isUncondBranchOpcode(int Opc) { in isUncondBranchOpcode()
155 inline static bool isCondBranchOpcode(int Opc) { in isCondBranchOpcode()
/external/llvm/lib/Target/XCore/
DXCoreInstrInfo.cpp290 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in InsertBranch() local
299 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in InsertBranch() local
/external/llvm/lib/Target/CellSPU/
DSPUInstrInfo.cpp430 unsigned Opc; //! The incoming opcode in ReverseBranchCondition() member
443 unsigned Opc = unsigned(Cond[0].getImm()); in ReverseBranchCondition() local
DSPUISelDAGToDAG.cpp402 unsigned Opc = N.getOpcode(); in DFormAddressPredicate() local
607 unsigned Opc = N->getOpcode(); in Select() local
763 unsigned Opc = SPU::ROTMAIr32_i32; in Select() local
794 unsigned Opc = SPU::DFNMSf64; in Select() local
807 unsigned Opc = SPU::XORfneg64; in Select() local
/external/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp304 static bool isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) { in isOpcWithIntImmediate()
448 unsigned Opc; in SelectCC() local
825 unsigned Opc = N->getValueType(0) == MVT::i32 ? PPC::ADDI : PPC::ADDI8; in Select() local
1066 unsigned Opc = Target.getValueType() == MVT::i32 ? PPC::MTCTR : PPC::MTCTR8; in Select() local
/external/llvm/lib/MC/
DMCExpr.cpp146 const MCBinaryExpr *MCBinaryExpr::Create(Opcode Opc, const MCExpr *LHS, in Create()
151 const MCUnaryExpr *MCUnaryExpr::Create(Opcode Opc, const MCExpr *Expr, in Create()

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