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Searched refs:EAX (Results 1 – 25 of 66) sorted by relevance

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/external/valgrind/main/none/tests/x86/
Dbug152818-x86.stdout.exp1 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 0, count = 4 (EAX = 123487FD, EFLAGS = …
2 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 0, count = 3 (EAX = 123487FE, EFLAGS = …
3 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 0, count = 2 (EAX = 123487FF, EFLAGS = …
4 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 0, count = 1 (EAX = 123487AA, EFLAGS = …
5 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 0, count = 0 (EAX = 12348765, EFLAGS = …
6 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 1, count = 0 (EAX = 12348765, EFLAGS = …
7 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 1, count = 1 (EAX = 123487AA, EFLAGS = …
8 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 1, count = 2 (EAX = 12348701, EFLAGS = …
9 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 1, count = 3 (EAX = 12348702, EFLAGS = …
10 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 1, count = 4 (EAX = 12348703, EFLAGS = …
[all …]
/external/llvm/test/CodeGen/X86/
Dabi-isel.ll41 ; LINUX-64-STATIC: movl src(%rip), [[EAX:%e.x]]
42 ; LINUX-64-STATIC: movl [[EAX]], dst
46 ; LINUX-32-STATIC: movl src, [[EAX:%e.x]]
47 ; LINUX-32-STATIC-NEXT: movl [[EAX]], dst
51 ; LINUX-32-PIC: movl src, [[EAX:%e.x]]
52 ; LINUX-32-PIC-NEXT: movl [[EAX]], dst
57 ; LINUX-64-PIC-NEXT: movl ([[RAX]]), [[EAX:%e..]]
59 ; LINUX-64-PIC-NEXT: movl [[EAX]], ([[RCX]])
63 ; DARWIN-32-STATIC: movl _src, [[EAX:%e.x]]
64 ; DARWIN-32-STATIC-NEXT: movl [[EAX]], _dst
[all …]
Dthiscall-struct-return.ll24 ; into EAX instead of returning directly in EAX. The this
43 ; into EAX instead of returning directly in EAX/EDX. The this
Dfast-cc-pass-in-regs.ll14 ; CHECK: mov{{.*}}EAX, ECX
27 ; CHECK: mov{{.*}}EAX, ECX
D2008-09-17-inline-asm-1.ll4 ; %0 must not be put in EAX or EDX.
5 ; In the first asm, $0 and $2 must not be put in EAX.
Dlea-2.ll2 ; RUN: grep {lea EAX, DWORD PTR \\\[... + 4\\*... - 5\\\]}
/external/llvm/lib/Support/
DHost.cpp102 static void DetectX86FamilyModel(unsigned EAX, unsigned &Family, in DetectX86FamilyModel() argument
104 Family = (EAX >> 8) & 0xf; // Bits 8 - 11 in DetectX86FamilyModel()
105 Model = (EAX >> 4) & 0xf; // Bits 4 - 7 in DetectX86FamilyModel()
109 Family += (EAX >> 20) & 0xff; // Bits 20 - 27 in DetectX86FamilyModel()
111 Model += ((EAX >> 16) & 0xf) << 4; // Bits 16 - 19 in DetectX86FamilyModel()
116 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; in getHostCPUName() local
117 if (GetX86CpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX)) in getHostCPUName()
121 DetectX86FamilyModel(EAX, Family, Model); in getHostCPUName()
124 GetX86CpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX); in getHostCPUName()
132 GetX86CpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1); in getHostCPUName()
/external/llvm/lib/Target/X86/
DX86InstrSVM.td28 let Uses = [EAX] in
29 def SKINIT : I<0x01, MRM_DE, (outs), (ins), "skinit\t{%eax|EAX}", []>, TB;
32 let Uses = [EAX] in
34 "vmrun\t{%eax|EAX}", []>, TB, Requires<[In32BitMode]>;
40 let Uses = [EAX] in
42 "vmload\t{%eax|EAX}", []>, TB, Requires<[In32BitMode]>;
48 let Uses = [EAX] in
50 "vmsave\t{%eax|EAX}", []>, TB, Requires<[In32BitMode]>;
56 let Uses = [EAX, ECX] in
58 "invlpga\t{%ecx, %eax|EAX, ECX}", []>, TB, Requires<[In32BitMode]>;
DX86Subtarget.cpp178 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; in AutoDetectSubtargetFeatures() local
189 X86_MC::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX); in AutoDetectSubtargetFeatures()
243 X86_MC::DetectFamilyModel(EAX, Family, Model); in AutoDetectSubtargetFeatures()
266 X86_MC::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX); in AutoDetectSubtargetFeatures()
293 if (!X86_MC::GetCpuIDAndInfoEx(0x7, 0x0, &EAX, &EBX, &ECX, &EDX)) { in AutoDetectSubtargetFeatures()
DX86InstrExtension.td18 let Defs = [EAX], Uses = [AX] in
20 "{cwtl|cwde}", []>; // EAX = signext(AX)
25 let Defs = [EAX,EDX], Uses = [EAX] in
27 "{cltd|cdq}", []>; // EDX:EAX = signext(EAX)
30 let Defs = [RAX], Uses = [EAX] in
32 "{cltq|cdqe}", []>; // RAX = signext(EAX)
DX86InstrArithmetic.td63 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX], neverHasSideEffects = 1 in
65 "mul{l}\t$src", // EAX,EDX = EAX*GR32
66 [/*(set EAX, EDX, EFLAGS, (X86umul_flag EAX, GR32:$src))*/],
89 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX] in
92 [], IIC_MUL32_MEM>; // EAX,EDX = EAX*[mem32]
105 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX] in
107 IIC_IMUL32_RR>; // EAX,EDX = EAX*GR32
120 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX] in
122 "imul{l}\t$src", [], IIC_IMUL32_MEM>; // EAX,EDX = EAX*[mem32]
275 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX,EDX] in
[all …]
DX86CallingConv.td34 CCIfType<[i32], CCAssignToReg<[EAX, EDX]>>,
82 CCIfType<[i32], CCAssignToReg<[EAX, EDX, ECX]>>,
310 CCIfNotVarArg<CCIfInReg<CCIfType<[i32], CCAssignToReg<[EAX, EDX, ECX]>>>>,
320 // The 'nest' parameter, if any, is passed in EAX.
321 CCIfNest<CCAssignToReg<[EAX]>>,
334 // Pass sret arguments indirectly through EAX
335 CCIfSRet<CCAssignToReg<[EAX]>>,
353 // The 'nest' parameter, if any, is passed in EAX.
354 CCIfNest<CCAssignToReg<[EAX]>>,
421 def CSR_32EHRet : CalleeSavedRegs<(add EAX, EDX, CSR_32)>;
DX86RegisterInfo.td100 def EAX : RegisterWithSubRegs<"eax", [AX]>, DwarfRegNum<[-2, 0, 0]>;
124 def RAX : RegisterWithSubRegs<"rax", [EAX]>, DwarfRegNum<[0, -2, -2]>;
304 (add EAX, ECX, EDX, ESI, EDI, EBX, EBP, ESP,
342 def GR32_ABCD : RegisterClass<"X86", [i32], 32, (add EAX, ECX, EDX, EBX)> {
353 def GR32_TC : RegisterClass<"X86", [i32], 32, (add EAX, ECX, EDX)> {
381 (add EAX, ECX, EDX, ESI, EDI, EBX, EBP, ESP)> {
393 // GR32_NOAX - GR32 registers except EAX. Used by AddRegFrm of XCHG32 in 64-bit
396 def GR32_NOAX : RegisterClass<"X86", [i32], 32, (sub GR32, EAX)> {
428 // A class to support the 'A' assembler constraint: EAX then EDX.
429 def GR32_AD : RegisterClass<"X86", [i32], 32, (add EAX, EDX)> {
/external/dropbear/libtomcrypt/notes/
Deax_tv.txt1 EAX Test Vectors. Uses the 00010203...NN-1 pattern for header/nonce/plaintext/key. The outputs
5 EAX-aes (16 byte key)
40 EAX-blowfish (8 byte key)
59 EAX-xtea (16 byte key)
78 EAX-rc5 (8 byte key)
97 EAX-rc6 (16 byte key)
132 EAX-safer+ (16 byte key)
167 EAX-twofish (16 byte key)
202 EAX-safer-k64 (8 byte key)
221 EAX-safer-sk64 (8 byte key)
[all …]
/external/llvm/test/MC/X86/
Dintel-syntax.s4 xor EAX, EAX
17 mov EAX, DWORD PTR [RSP - 4]
25 mov EAX, DWORD PTR [RSP + 4*RAX - 24]
59 mov EAX, DWORD PTR FS:[RDI]
/external/qemu/distrib/sdl-1.2.12/src/hermes/
DHeadMMX.h81 #pragma aux ConvertMMX "_*" modify [EAX EBX ECX EDX ESI EDI]
83 #pragma aux ClearMMX_32 "_*" modify [EAX EBX ECX EDX ESI EDI]
84 #pragma aux ClearMMX_24 "_*" modify [EAX EBX ECX EDX ESI EDI]
85 #pragma aux ClearMMX_16 "_*" modify [EAX EBX ECX EDX ESI EDI]
86 #pragma aux ClearMMX_8 "_*" modify [EAX EBX ECX EDX ESI EDI]
DHeadX86.h138 #pragma aux ConvertX86 "_*" modify [EAX EBX ECX EDX ESI EDI]
139 #pragma aux ClearX86_32 "_*" modify [EAX EBX ECX EDX ESI EDI]
140 #pragma aux ClearX86_24 "_*" modify [EAX EBX ECX EDX ESI EDI]
141 #pragma aux ClearX86_16 "_*" modify [EAX EBX ECX EDX ESI EDI]
142 #pragma aux ClearX86_8 "_*" modify [EAX EBX ECX EDX ESI EDI]
/external/llvm/test/MC/Disassembler/X86/
Dintel-syntax.txt27 # CHECK: xchg EAX, R8D
39 # CHECK: add EAX, 0
51 # CHECK: adc EAX, 0
63 # CHECK: cmp EAX, 0
75 # CHECK: test EAX, 0
/external/qemu/target-i386/
Dop_helper.c381 stl_kernel(env->tr.base + (0x28 + 0 * 4), EAX); in switch_tss()
395 stw_kernel(env->tr.base + (0x12 + 0 * 2), EAX); in switch_tss()
447 EAX = new_regs[0]; in switch_tss()
1235 qemu_log(" EAX=" TARGET_FMT_lx, EAX); in do_interrupt()
1425 stq_phys(sm_state + 0x7ff8, EAX); in do_smm_enter()
1458 stl_phys(sm_state + 0x7fd0, EAX); in do_smm_enter()
1551 EAX = ldq_phys(sm_state + 0x7ff8); in helper_rsm()
1588 EAX = ldl_phys(sm_state + 0x7fd0); in helper_rsm()
1643 num = (EAX & 0xffff); in helper_divb_AL()
1653 EAX = (EAX & ~0xffff) | (r << 8) | q; in helper_divb_AL()
[all …]
Dexec.h37 #define EAX (env->regs[R_EAX]) macro
288 EAX = env->regs[R_EAX]; in env_to_regs()
316 env->regs[R_EAX] = EAX; in regs_to_env()
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp185 void X86_MC::DetectFamilyModel(unsigned EAX, unsigned &Family, in DetectFamilyModel() argument
187 Family = (EAX >> 8) & 0xf; // Bits 8 - 11 in DetectFamilyModel()
188 Model = (EAX >> 4) & 0xf; // Bits 4 - 7 in DetectFamilyModel()
192 Family += (EAX >> 20) & 0xff; // Bits 20 - 27 in DetectFamilyModel()
194 Model += ((EAX >> 16) & 0xf) << 4; // Bits 16 - 19 in DetectFamilyModel()
216 case X86::RAX: case X86::EAX: case X86::AX: case X86::AL: return N86::EAX; in getX86RegNum()
230 return N86::EAX; in getX86RegNum()
DX86MCTargetDesc.h46 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7 enumerator
63 void DetectFamilyModel(unsigned EAX, unsigned &Family, unsigned &Model);
/external/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp1149 else if (reg == X86::EAX && (isLods || Name == "lodsl")) in ParseInstruction()
1179 else if (reg == X86::EAX && (isStos || Name == "stosl")) in ParseInstruction()
1261 TmpInst.addOperand(MCOperand::CreateReg(X86::EAX)); in processInstruction()
1262 TmpInst.addOperand(MCOperand::CreateReg(X86::EAX)); in processInstruction()
1300 TmpInst.addOperand(MCOperand::CreateReg(X86::EAX)); in processInstruction()
1301 TmpInst.addOperand(MCOperand::CreateReg(X86::EAX)); in processInstruction()
1339 TmpInst.addOperand(MCOperand::CreateReg(X86::EAX)); in processInstruction()
1340 TmpInst.addOperand(MCOperand::CreateReg(X86::EAX)); in processInstruction()
1377 TmpInst.addOperand(MCOperand::CreateReg(X86::EAX)); in processInstruction()
1414 TmpInst.addOperand(MCOperand::CreateReg(X86::EAX)); in processInstruction()
[all …]
/external/llvm/include/llvm/Support/
DSolaris.h26 #undef EAX
/external/kernel-headers/original/asm-x86/
Dptrace-abi.h12 #define EAX 6 macro

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