1; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | FileCheck %s 2; check that fastcc is passing stuff in regs. 3 4declare x86_fastcallcc i64 @callee(i64) 5 6define i64 @caller() { 7 %X = call x86_fastcallcc i64 @callee( i64 4294967299 ) ; <i64> [#uses=1] 8; CHECK: mov{{.*}}EDX, 1 9 ret i64 %X 10} 11 12define x86_fastcallcc i64 @caller2(i64 %X) { 13 ret i64 %X 14; CHECK: mov{{.*}}EAX, ECX 15} 16 17declare x86_thiscallcc i64 @callee2(i32) 18 19define i64 @caller3() { 20 %X = call x86_thiscallcc i64 @callee2( i32 3 ) 21; CHECK: mov{{.*}}ECX, 3 22 ret i64 %X 23} 24 25define x86_thiscallcc i32 @caller4(i32 %X) { 26 ret i32 %X 27; CHECK: mov{{.*}}EAX, ECX 28} 29 30