/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorTypes.cpp | 156 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(), in ScalarizeVecRes_EXTRACT_SUBVECTOR() 350 case ISD::EXTRACT_VECTOR_ELT: in ScalarizeVectorOperand() 935 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, in SplitVecRes_VECTOR_SHUFFLE() 984 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break; in SplitVectorOperand() 1169 Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, in SplitVecOp_CONCAT_VECTORS() 1389 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, in WidenVecRes_Binary() 1391 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, in WidenVecRes_Binary() 1532 SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp, in WidenVecRes_Convert() 1758 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp, in WidenVecRes_CONCAT_VECTORS() 1832 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp, in WidenVecRes_CONVERT_RNDSAT() [all …]
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D | LegalizeTypesGeneric.cpp | 101 Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NOutVT, CastInOp, in ExpandRes_BITCAST() 103 Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NOutVT, CastInOp, in ExpandRes_BITCAST() 191 Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); in ExpandRes_EXTRACT_VECTOR_ELT() 195 Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); in ExpandRes_EXTRACT_VECTOR_ELT()
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D | LegalizeVectorOps.cpp | 368 SDValue Ex = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, in ExpandStore() 482 SDValue LHSElem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, LHS, in UnrollVSETCC() 484 SDValue RHSElem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, RHS, in UnrollVSETCC()
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D | LegalizeIntegerTypes.cpp | 64 case ISD::EXTRACT_VECTOR_ELT: in PromoteIntegerResult() 347 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NVT, N->getOperand(0), in PromoteIntRes_EXTRACT_VECTOR_ELT() 769 case ISD::EXTRACT_VECTOR_ELT: Res = PromoteIntOp_EXTRACT_VECTOR_ELT(N); break; in PromoteIntegerOperand() 1099 case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break; in ExpandIntegerResult() 2877 SDValue Ext = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, in PromoteIntRes_EXTRACT_SUBVECTOR() 2965 SDValue Ext = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, in PromoteIntRes_CONCAT_VECTORS() 2994 SDValue Ext = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, in PromoteIntOp_EXTRACT_VECTOR_ELT() 3020 SDValue Ex = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, SclrTy, in PromoteIntOp_CONCAT_VECTORS()
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D | SelectionDAGDumper.cpp | 191 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; in getOperationName()
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D | LegalizeFloatTypes.cpp | 64 case ISD::EXTRACT_VECTOR_ELT: in SoftenFloatResult() 134 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(), in SoftenFloatRes_EXTRACT_VECTOR_ELT() 845 case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break; in ExpandFloatResult()
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D | LegalizeDAG.cpp | 732 case ISD::EXTRACT_VECTOR_ELT: in LegalizeOp() 2780 case ISD::EXTRACT_VECTOR_ELT: in ExpandNode() 2866 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, in ExpandNode() 2870 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, in ExpandNode() 3449 SDValue Ex = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, in ExpandNode() 3452 SDValue Sh = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, in ExpandNode()
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D | SelectionDAG.cpp | 2584 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && in getNode() 2838 case ISD::EXTRACT_VECTOR_ELT: in getNode() 2850 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, in getNode() 2891 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); in getNode() 5910 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, in UnrollVectorOp()
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D | SelectionDAGBuilder.cpp | 464 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, in getCopyToPartsVector() 490 Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, in getCopyToPartsVector() 522 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, in getCopyToPartsVector() 2802 setValue(&I, DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurDebugLoc(), in visitExtractElement() 2985 Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurDebugLoc(), in visitShuffleVector()
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D | DAGCombiner.cpp | 1151 case ISD::EXTRACT_VECTOR_ELT: return visitEXTRACT_VECTOR_ELT(N); in visit() 2465 if ((N0.getOpcode() == ISD::EXTRACT_VECTOR_ELT && in visitAND() 5212 if (N0.getOpcode() == ISD::EXTRACT_VECTOR_ELT && in visitTRUNCATE() 5234 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, in visitTRUNCATE() 7326 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(), NVT, in visitEXTRACT_VECTOR_ELT() 7613 if (N->getOperand(i).getOpcode() != ISD::EXTRACT_VECTOR_ELT || in visitBUILD_VECTOR()
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 257 EXTRACT_VECTOR_ELT, enumerator
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 725 setOperationAction(ISD::EXTRACT_VECTOR_ELT,(MVT::SimpleValueType)VT,Expand); in X86TargetLowering() 828 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4f32, Custom); in X86TargetLowering() 890 setOperationAction(ISD::EXTRACT_VECTOR_ELT, in X86TargetLowering() 899 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2f64, Custom); in X86TargetLowering() 903 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2i64, Custom); in X86TargetLowering() 969 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v16i8, Custom); in X86TargetLowering() 970 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v8i16, Custom); in X86TargetLowering() 971 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4i32, Custom); in X86TargetLowering() 972 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4f32, Custom); in X86TargetLowering() 978 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2i64, Custom); in X86TargetLowering() [all …]
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 108 setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT.getSimpleVT(), Custom); in addTypeForNEON() 1372 SDValue Op0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerCall() 1374 SDValue Op1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerCall() 1896 SDValue Half = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerReturn() 1910 Arg = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerReturn() 3256 Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, Res, in LowerFCOPYSIGN() 3839 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecConstant, in LowerConstantFP() 3854 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecFConstant, in LowerConstantFP() 3866 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecFConstant, in LowerConstantFP() 4236 else if (V.getOpcode() != ISD::EXTRACT_VECTOR_ELT) { in ReconstructShuffle() [all …]
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/external/llvm/lib/Target/CellSPU/ |
D | SPUISelLowering.cpp | 445 setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom); in SPUTargetLowering() 2363 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i8, CNTB, Elt0); in LowerCTPOP() 2383 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i16, CNTB, Elt0); in LowerCTPOP() 2417 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, CNTB, Elt0); in LowerCTPOP() 2831 case ISD::EXTRACT_VECTOR_ELT: in LowerOperation()
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 362 def extractelt : SDNode<"ISD::EXTRACT_VECTOR_ELT", SDTVecExtract>; 460 def vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT",
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 346 setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Expand); in PPCTargetLowering()
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