| /external/llvm/test/CodeGen/X86/ |
| D | avx-fp2int.ll | 3 ;; Check that FP_TO_SINT and FP_TO_UINT generate convert with truncate
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 384 FP_TO_UINT, enumerator
|
| /external/llvm/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 332 setOperationAction(ISD::FP_TO_UINT, MVT::i8, Promote); in SPUTargetLowering()
334 setOperationAction(ISD::FP_TO_UINT, MVT::i16, Promote); in SPUTargetLowering()
338 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in SPUTargetLowering()
340 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); in SPUTargetLowering()
342 setOperationAction(ISD::FP_TO_UINT, MVT::i128, Expand); in SPUTargetLowering()
393 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Promote); in SPUTargetLowering()
2817 case ISD::FP_TO_UINT: in LowerOperation()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 84 case ISD::FP_TO_UINT: in ScalarizeVectorResult()
498 case ISD::FP_TO_UINT: in SplitVectorResult()
996 case ISD::FP_TO_UINT: in SplitVectorOperand()
1297 case ISD::FP_TO_UINT: in WidenVectorResult()
2053 case ISD::FP_TO_UINT: in WidenVectorOperand()
|
| D | SelectionDAGDumper.cpp | 226 case ISD::FP_TO_UINT: return "fp_to_uint"; in getOperationName()
|
| D | LegalizeVectorOps.cpp | 202 case ISD::FP_TO_UINT: in LegalizeOp()
|
| D | LegalizeIntegerTypes.cpp | 98 case ISD::FP_TO_UINT: Res = PromoteIntRes_FP_TO_XINT(N); break; in PromoteIntegerResult()
360 if (N->getOpcode() == ISD::FP_TO_UINT && in PromoteIntRes_FP_TO_XINT()
361 !TLI.isOperationLegal(ISD::FP_TO_UINT, NVT) && in PromoteIntRes_FP_TO_XINT()
370 return DAG.getNode(N->getOpcode() == ISD::FP_TO_UINT ? in PromoteIntRes_FP_TO_XINT()
1113 case ISD::FP_TO_UINT: ExpandIntRes_FP_TO_UINT(N, Lo, Hi); break; in ExpandIntegerResult()
|
| D | LegalizeFloatTypes.cpp | 588 case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_UINT(N); break; in SoftenFloatOperand()
1268 case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break; in ExpandFloatOperand()
|
| D | LegalizeDAG.cpp | 2272 if (TLI.isOperationLegalOrCustom(ISD::FP_TO_UINT, NewOutTy)) { in PromoteLegalFP_TO_INT()
2273 OpToUse = ISD::FP_TO_UINT; in PromoteLegalFP_TO_INT()
2708 case ISD::FP_TO_UINT: { in ExpandNode()
3529 case ISD::FP_TO_UINT: in PromoteNode()
|
| D | DAGCombiner.cpp | 1140 case ISD::FP_TO_UINT: return visitFP_TO_UINT(N); in visit()
5943 return DAG.getNode(ISD::FP_TO_UINT, N->getDebugLoc(), VT, N0); in visitFP_TO_UINT()
|
| D | SelectionDAG.cpp | 2440 case ISD::FP_TO_UINT: { in getNode()
|
| D | SelectionDAGBuilder.cpp | 2733 setValue(&I, DAG.getNode(ISD::FP_TO_UINT, getCurDebugLoc(), DestVT, N)); in visitFPToUI()
|
| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeISelLowering.cpp | 77 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in MBlazeTargetLowering()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 113 setOperationAction(ISD::FP_TO_UINT, VT.getSimpleVT(), Custom); in addTypeForNEON()
118 setOperationAction(ISD::FP_TO_UINT, VT.getSimpleVT(), Expand); in addTypeForNEON()
541 setOperationAction(ISD::FP_TO_UINT, MVT::v4i16, Custom); in ARMTargetLowering()
559 setTargetDAGCombine(ISD::FP_TO_UINT); in ARMTargetLowering()
783 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in ARMTargetLowering()
3146 case ISD::FP_TO_UINT: in LowerFP_TO_INT()
5156 case ISD::FP_TO_UINT: return LowerFP_TO_INT(Op, DAG); in LowerOperation()
8424 case ISD::FP_TO_UINT: return PerformVCVTCombine(N, DCI, Subtarget); in PerformDAGCombine()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1210 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in HexagonTargetLowering()
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 302 setOperationAction(ISD::FP_TO_UINT , MVT::i1 , Promote); in X86TargetLowering()
303 setOperationAction(ISD::FP_TO_UINT , MVT::i8 , Promote); in X86TargetLowering()
304 setOperationAction(ISD::FP_TO_UINT , MVT::i16 , Promote); in X86TargetLowering()
307 setOperationAction(ISD::FP_TO_UINT , MVT::i64 , Expand); in X86TargetLowering()
308 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Promote); in X86TargetLowering()
315 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Expand); in X86TargetLowering()
319 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Custom); in X86TargetLowering()
325 setOperationAction(ISD::FP_TO_UINT , MVT::i64 , Custom); in X86TargetLowering()
758 setOperationAction(ISD::FP_TO_UINT, (MVT::SimpleValueType)VT, Expand); in X86TargetLowering()
10850 case ISD::FP_TO_UINT: return LowerFP_TO_UINT(Op, DAG); in LowerOperation()
[all …]
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 277 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); in PPCTargetLowering()
282 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in PPCTargetLowering()
290 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in PPCTargetLowering()
4578 case ISD::FP_TO_UINT: in LowerOperation()
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 724 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in SparcTargetLowering()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 180 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in MipsTargetLowering()
181 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); in MipsTargetLowering()
|
| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 393 def fp_to_uint : SDNode<"ISD::FP_TO_UINT" , SDTFPToIntOp>;
|