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Searched refs:Op2 (Results 1 – 25 of 36) sorted by relevance

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/external/llvm/include/llvm/Target/
DTargetSelectionDAGInfo.h59 SDValue Op1, SDValue Op2, in EmitTargetCodeForMemcpy() argument
76 SDValue Op1, SDValue Op2, in EmitTargetCodeForMemmove() argument
92 SDValue Op1, SDValue Op2, in EmitTargetCodeForMemset() argument
/external/llvm/include/llvm/CodeGen/
DSelectionDAG.h487 SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2,
493 Ops.push_back(Op2);
712 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2);
713 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
715 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
717 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
729 SDValue Op1, SDValue Op2);
731 SDValue Op1, SDValue Op2, SDValue Op3);
745 EVT VT2, SDValue Op1, SDValue Op2);
747 EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3);
[all …]
DISDOpcodes.h781 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
787 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
DFastISel.h267 unsigned Op2, bool Op2IsKill);
DSelectionDAGNodes.h722 const SDValue &Op2) {
728 Ops[2].setInitial(Op2);
736 const SDValue &Op2, const SDValue &Op3) {
742 Ops[2].setInitial(Op2);
/external/llvm/lib/Target/PTX/InstPrinter/
DPTXInstPrinter.cpp201 const MCOperand &Op2 = MI->getOperand(OpNo+1); in printMemOperand() local
203 if (Op2.getImm() == 0) in printMemOperand()
205 O << "+" << Op2.getImm(); in printMemOperand()
/external/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp1100 X86Operand &Op2 = *(X86Operand*)Operands.begin()[2]; in ParseInstruction() local
1101 if (Op.isReg() && Op.getReg() == X86::DX && isDstOp(Op2)) { in ParseInstruction()
1105 delete &Op2; in ParseInstruction()
1113 X86Operand &Op2 = *(X86Operand*)Operands.begin()[2]; in ParseInstruction() local
1114 if (isSrcOp(Op) && Op2.isReg() && Op2.getReg() == X86::DX) { in ParseInstruction()
1118 delete &Op2; in ParseInstruction()
1127 X86Operand &Op2 = *(X86Operand*)Operands.begin()[2]; in ParseInstruction() local
1128 if (isSrcOp(Op) && isDstOp(Op2)) { in ParseInstruction()
1132 delete &Op2; in ParseInstruction()
1140 X86Operand *Op2 = static_cast<X86Operand*>(Operands[2]); in ParseInstruction() local
[all …]
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp395 SDValue Op2 = Op.getOperand(2); in ExpandVSELECT() local
412 Op2 = DAG.getNode(ISD::BITCAST, DL, VT, Op2); in ExpandVSELECT()
419 Op2 = DAG.getNode(ISD::AND, DL, VT, Op2, NotMask); in ExpandVSELECT()
420 SDValue Val = DAG.getNode(ISD::OR, DL, VT, Op1, Op2); in ExpandVSELECT()
DSelectionDAG.cpp271 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, in getSetCCOrOperation() argument
273 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) in getSetCCOrOperation()
277 unsigned Op = Op1 | Op2; // Combine all of the condition bits. in getSetCCOrOperation()
295 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, in getSetCCAndOperation() argument
297 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) in getSetCCAndOperation()
302 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); in getSetCCAndOperation()
735 SDValue Op1, SDValue Op2, in FindModifiedNodeSlot() argument
740 SDValue Ops[] = { Op1, Op2 }; in FindModifiedNodeSlot()
4705 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { in UpdateNodeOperands() argument
4709 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) in UpdateNodeOperands()
[all …]
DSelectionDAGBuilder.cpp1882 SDValue Op2 = DAG.getNode(ISD::EHSELECTION, getCurDebugLoc(), VTs, Ops, 2); in visitLandingPad() local
1883 Chain = Op2.getValue(1); in visitLandingPad()
1884 Op2 = DAG.getSExtOrTrunc(Op2, getCurDebugLoc(), MVT::i32); in visitLandingPad()
1887 Ops[1] = Op2; in visitLandingPad()
2570 SDValue Op2 = getValue(I.getOperand(1)); in visitFSub() local
2572 Op2.getValueType(), Op2)); in visitFSub()
2581 SDValue Op2 = getValue(I.getOperand(1)); in visitBinary() local
2583 Op1.getValueType(), Op1, Op2)); in visitBinary()
2588 SDValue Op2 = getValue(I.getOperand(1)); in visitShift() local
2590 MVT ShiftTy = TLI.getShiftAmountTy(Op2.getValueType()); in visitShift()
[all …]
DLegalizeIntegerTypes.cpp181 SDValue Op2 = GetPromotedInteger(N->getOperand(2)); in PromoteIntRes_Atomic1() local
185 Op2, N->getMemOperand(), N->getOrdering(), in PromoteIntRes_Atomic1()
194 SDValue Op2 = GetPromotedInteger(N->getOperand(2)); in PromoteIntRes_Atomic2() local
198 Op2, Op3, N->getMemOperand(), N->getOrdering(), in PromoteIntRes_Atomic2()
849 SDValue Op2 = GetPromotedInteger(N->getOperand(2)); in PromoteIntOp_ATOMIC_STORE() local
851 N->getChain(), N->getBasePtr(), Op2, N->getMemOperand(), in PromoteIntOp_ATOMIC_STORE()
1409 unsigned Op1, Op2; in ExpandShiftWithKnownAmountBit() local
1412 case ISD::SHL: Op1 = ISD::SHL; Op2 = ISD::SRL; break; in ExpandShiftWithKnownAmountBit()
1414 case ISD::SRA: Op1 = ISD::SRL; Op2 = ISD::SHL; break; in ExpandShiftWithKnownAmountBit()
1423 SDValue Sh1 = DAG.getNode(Op2, dl, NVT, InL, DAG.getConstant(1, ShTy)); in ExpandShiftWithKnownAmountBit()
[all …]
/external/llvm/lib/Target/PTX/
DPTXSelectionDAGInfo.h44 SDValue Op1, SDValue Op2,
DPTXInstrInfo.h121 SDValue Op1, SDValue Op2);
DPTXInstrInfo.cpp327 DebugLoc dl, EVT VT, SDValue Op1, SDValue Op2) { in GetPTXMachineNode() argument
330 SDValue ops[] = { Op1, Op2, predReg, predOp }; in GetPTXMachineNode()
DPTXISelLowering.cpp158 SDValue Op2 = Op.getOperand(2); in LowerSETCC() local
182 return DAG.getNode(ISD::SETCC, dl, MVT::i1, Op0, Op1, Op2); in LowerSETCC()
/external/llvm/lib/Analysis/
DConstantFolding.cpp1348 if (ConstantFP *Op2 = dyn_cast<ConstantFP>(Operands[1])) { in ConstantFoldCall() local
1349 if (Op2->getType() != Op1->getType()) in ConstantFoldCall()
1353 (double)Op2->getValueAPF().convertToFloat(): in ConstantFoldCall()
1354 Op2->getValueAPF().convertToDouble(); in ConstantFoldCall()
1381 if (ConstantInt *Op2 = dyn_cast<ConstantInt>(Operands[1])) { in ConstantFoldCall() local
1395 Res = Op1->getValue().sadd_ov(Op2->getValue(), Overflow); in ConstantFoldCall()
1398 Res = Op1->getValue().uadd_ov(Op2->getValue(), Overflow); in ConstantFoldCall()
1401 Res = Op1->getValue().ssub_ov(Op2->getValue(), Overflow); in ConstantFoldCall()
1404 Res = Op1->getValue().usub_ov(Op2->getValue(), Overflow); in ConstantFoldCall()
1407 Res = Op1->getValue().smul_ov(Op2->getValue(), Overflow); in ConstantFoldCall()
[all …]
/external/llvm/lib/Target/Hexagon/
DHexagonPeephole.cpp241 MachineOperand Op2 = MI->getOperand(S2); in runOnMachineFunction() local
242 ChangeOpInto(MI->getOperand(S1), Op2); in runOnMachineFunction()
/external/llvm/lib/Target/ARM/
DARMSelectionDAGInfo.h60 SDValue Op1, SDValue Op2,
DARMFastISel.cpp120 unsigned Op2, bool Op2IsKill);
342 unsigned Op2, bool Op2IsKill) { in FastEmitInst_rrr() argument
350 .addReg(Op2, Op2IsKill * RegState::Kill)); in FastEmitInst_rrr()
355 .addReg(Op2, Op2IsKill * RegState::Kill)); in FastEmitInst_rrr()
1799 unsigned Op2 = getRegForValue(I->getOperand(1)); in SelectBinaryFPOp() local
1800 if (Op2 == 0) return false; in SelectBinaryFPOp()
1805 .addReg(Op1).addReg(Op2)); in SelectBinaryFPOp()
/external/llvm/include/llvm/Analysis/
DScalarEvolution.h582 const SCEV *getAddExpr(const SCEV *Op0, const SCEV *Op1, const SCEV *Op2,
587 Ops.push_back(Op2);
600 const SCEV *getMulExpr(const SCEV *Op0, const SCEV *Op1, const SCEV *Op2,
605 Ops.push_back(Op2);
/external/llvm/lib/AsmParser/
DLLParser.cpp3051 BasicBlock *Op1, *Op2; in ParseBr() local
3065 ParseTypeAndBasicBlock(Op2, Loc2, PFS)) in ParseBr()
3068 Inst = BranchInst::Create(Op1, Op2, Op0); in ParseBr()
3376 Value *Op0, *Op1, *Op2; in ParseSelect() local
3381 ParseTypeAndValue(Op2, PFS)) in ParseSelect()
3384 if (const char *Reason = SelectInst::areInvalidOperands(Op0, Op1, Op2)) in ParseSelect()
3387 Inst = SelectInst::Create(Op0, Op1, Op2); in ParseSelect()
3430 Value *Op0, *Op1, *Op2; in ParseInsertElement() local
3435 ParseTypeAndValue(Op2, PFS)) in ParseInsertElement()
3438 if (!InsertElementInst::isValidOperands(Op0, Op1, Op2)) in ParseInsertElement()
[all …]
/external/llvm/lib/CodeGen/
DScheduleDAGInstrs.cpp776 unsigned Op2 = DefMI->findRegisterDefOperandIdx(Reg, false, true, TRI); in computeOperandLatency() local
777 if (DefMI->getOperand(Op2).isReg()) in computeOperandLatency()
778 DefIdx = Op2; in computeOperandLatency()
DRegisterCoalescer.cpp633 unsigned Op1, Op2, NewDstIdx; in RemoveCopyByCommutingDef() local
634 if (!TII->findCommutedOpIndices(DefMI, Op1, Op2)) in RemoveCopyByCommutingDef()
637 NewDstIdx = Op2; in RemoveCopyByCommutingDef()
638 else if (Op2 == UseOpIdx) in RemoveCopyByCommutingDef()
/external/llvm/lib/Transforms/InstCombine/
DInstCombineCompares.cpp2224 Value *Op1 = 0, *Op2 = 0; in visitICmpInst() local
2228 Op2 = ConstantExpr::getICmp(I.getPredicate(), C, RHSC); in visitICmpInst()
2236 if ((Op1 && Op2) || (LHSI->hasOneUse() && (Op1 || Op2))) { in visitICmpInst()
2240 if (!Op2) in visitICmpInst()
2241 Op2 = Builder->CreateICmp(I.getPredicate(), LHSI->getOperand(2), in visitICmpInst()
2243 return SelectInst::Create(LHSI->getOperand(0), Op1, Op2); in visitICmpInst()
2934 Value *Op1 = 0, *Op2 = 0; in visitFCmpInst() local
2940 Op2 = Builder->CreateFCmp(I.getPredicate(), in visitFCmpInst()
2944 Op2 = ConstantExpr::getCompare(I.getPredicate(), C, RHSC); in visitFCmpInst()
2952 return SelectInst::Create(LHSI->getOperand(0), Op1, Op2); in visitFCmpInst()
/external/llvm/lib/Bitcode/Reader/
DBitcodeReader.cpp1250 Constant *Op2 = ValueList.getConstantFwdRef(Record[2], Type::getInt32Ty(Context)); in ParseConstants() local
1251 V = ConstantExpr::getInsertElement(Op0, Op1, Op2); in ParseConstants()
1262 Constant *Op2 = ValueList.getConstantFwdRef(Record[2], ShufTy); in ParseConstants() local
1263 V = ConstantExpr::getShuffleVector(Op0, Op1, Op2); in ParseConstants()
1276 Constant *Op2 = ValueList.getConstantFwdRef(Record[3], ShufTy); in ParseConstants() local
1277 V = ConstantExpr::getShuffleVector(Op0, Op1, Op2); in ParseConstants()

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