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Searched refs:OpInfo (Results 1 – 25 of 31) sorted by relevance

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/external/webkit/Source/JavaScriptCore/dfg/
DDFGByteCodeParser.cpp130 getNode = addToGraph(GetLocal, OpInfo(operand)); in getVariable()
137 m_variables[operand].set = addToGraph(SetLocal, OpInfo(operand), value); in setVariable()
172 getNode = addToGraph(GetLocal, OpInfo(operand)); in getArgument()
182 m_arguments[argument].set = addToGraph(SetLocal, OpInfo(operand), value); in setArgument()
286 NodeIndex resultIndex = addToGraph(Int32Constant, OpInfo(constant)); in getInt32Constant()
296 NodeIndex resultIndex = addToGraph(DoubleConstant, OpInfo(constant)); in getDoubleConstant()
307 NodeIndex resultIndex = addToGraph(JSConstant, OpInfo(constant)); in getJSConstant()
441 …NodeIndex addToGraph(NodeType op, OpInfo info, NodeIndex child1 = NoNode, NodeIndex child2 = NoNod… in addToGraph()
450 …NodeIndex addToGraph(NodeType op, OpInfo info1, OpInfo info2, NodeIndex child1 = NoNode, NodeIndex… in addToGraph()
550 addToGraph(Jump, OpInfo(m_currentIndex)); in parseBlock()
[all …]
DDFGNode.h164 struct OpInfo { struct
165 explicit OpInfo(unsigned value) : m_value(value) {} in OpInfo() argument
186 …Node(NodeType op, ExceptionInfo exceptionInfo, OpInfo imm, NodeIndex child1 = NoNode, NodeIndex ch… argument
199 …Node(NodeType op, ExceptionInfo exceptionInfo, OpInfo imm1, OpInfo imm2, NodeIndex child1 = NoNode…
/external/llvm/include/llvm/MC/
DMCInstrDesc.h144 const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands variable
151 (OpInfo[OpNum].Constraints & (1 << Constraint))) { in getOperandConstraint()
153 return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf; in getOperandConstraint()
526 if (OpInfo[i].isPredicate()) in findFirstPredOperandIdx()
/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp2854 AsmOperandInfo &OpInfo = ConstraintOperands.back(); in ParseConstraints() local
2857 if (OpInfo.multipleAlternatives.size() > maCount) in ParseConstraints()
2858 maCount = OpInfo.multipleAlternatives.size(); in ParseConstraints()
2860 OpInfo.ConstraintVT = MVT::Other; in ParseConstraints()
2863 switch (OpInfo.Type) { in ParseConstraints()
2866 if (OpInfo.isIndirect) { in ParseConstraints()
2867 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++)); in ParseConstraints()
2876 OpInfo.ConstraintVT = getValueType(STy->getElementType(ResNo)); in ParseConstraints()
2879 OpInfo.ConstraintVT = getValueType(CS.getType()); in ParseConstraints()
2884 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++)); in ParseConstraints()
[all …]
DSelectionDAGBuilder.cpp5757 SDISelAsmOperandInfo &OpInfo) { in GetRegistersForValue() argument
5766 TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode, in GetRegistersForValue()
5767 OpInfo.ConstraintVT); in GetRegistersForValue()
5770 if (OpInfo.ConstraintVT != MVT::Other) { in GetRegistersForValue()
5774 if (OpInfo.Type == InlineAsm::isInput && in GetRegistersForValue()
5775 PhysReg.second && !PhysReg.second->hasType(OpInfo.ConstraintVT)) { in GetRegistersForValue()
5780 if (RegVT.getSizeInBits() == OpInfo.ConstraintVT.getSizeInBits()) { in GetRegistersForValue()
5781 OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, DL, in GetRegistersForValue()
5782 RegVT, OpInfo.CallOperand); in GetRegistersForValue()
5783 OpInfo.ConstraintVT = RegVT; in GetRegistersForValue()
[all …]
DInstrEmitter.cpp200 if (II.OpInfo[i].isOptionalDef()) { in CreateVirtualRegisters()
287 MCID.OpInfo[IIOpNum].isOptionalDef(); in AddRegisterOperand()
/external/llvm/utils/TableGen/
DFixedLenDecoderEmitter.cpp363 const OperandInfo &OpInfo) const;
757 const OperandInfo &OpInfo) const { in emitBinaryParser()
758 const std::string &Decoder = OpInfo.Decoder; in emitBinaryParser()
760 if (OpInfo.numFields() == 1) { in emitBinaryParser()
761 OperandInfo::const_iterator OI = OpInfo.begin(); in emitBinaryParser()
767 for (OperandInfo::const_iterator OI = OpInfo.begin(), OE = OpInfo.end(); in emitBinaryParser()
1405 OperandInfo OpInfo(Decoder); in populateInstruction() local
1420 OpInfo.addField(Base, Width, Offset); in populateInstruction()
1431 OpInfo.addField(Base, Width, Offset); in populateInstruction()
1444 OpInfo.addField(Base, Width, Offset); in populateInstruction()
[all …]
DAsmWriterInst.cpp202 CGIOperandList::OperandInfo OpInfo = CGI.Operands[OpNo]; in AsmWriterInst() local
204 unsigned MIOp = OpInfo.MIOperandNo; in AsmWriterInst()
205 Operands.push_back(AsmWriterOperand(OpInfo.PrinterMethodName, in AsmWriterInst()
DAsmMatcherEmitter.cpp1436 const CGIOperandList::OperandInfo &OpInfo = ResultInst->Operands[i]; in BuildInstructionResultOperands() local
1439 int TiedOp = OpInfo.getTiedRegister(); in BuildInstructionResultOperands()
1446 int SrcOperand = FindAsmOperandNamed(OpInfo.Name); in BuildInstructionResultOperands()
1447 if (OpInfo.Name.empty() || SrcOperand == -1) in BuildInstructionResultOperands()
1449 TheDef->getName() + "' has operand '" + OpInfo.Name + in BuildInstructionResultOperands()
1453 unsigned NumOperands = OpInfo.MINumOperands; in BuildInstructionResultOperands()
1462 AsmOperands[SrcOperand+AI].SrcOpName == OpInfo.Name && in BuildInstructionResultOperands()
1478 const CGIOperandList::OperandInfo *OpInfo = &ResultInst->Operands[i]; in BuildAliasResultOperands() local
1481 int TiedOp = OpInfo->getTiedRegister(); in BuildAliasResultOperands()
1488 const std::string &OpName = OpInfo->Name; in BuildAliasResultOperands()
[all …]
DInstrInfoEmitter.h48 const OperandInfoMapTy &OpInfo,
DInstrInfoEmitter.cpp283 const OperandInfoMapTy &OpInfo, in emitRecord() argument
358 OS << "OperandInfo" << OpInfo.find(OperandInfo)->second; in emitRecord()
DCodeGenDAGPatterns.cpp2415 const SDNodeInfo &OpInfo = CDP.getSDNodeInfo(N1->getOperator()); in IsNodeBitcast() local
2416 if (OpInfo.getNumResults() != 1 || OpInfo.getNumOperands() != 1) in IsNodeBitcast()
2418 return OpInfo.getEnumName() == "ISD::BITCAST"; in IsNodeBitcast()
2447 const SDNodeInfo &OpInfo = CDP.getSDNodeInfo(N->getOperator()); in AnalyzeNode() local
2450 if (OpInfo.hasProperty(SDNPMayStore)) mayStore = true; in AnalyzeNode()
2451 if (OpInfo.hasProperty(SDNPMayLoad)) mayLoad = true; in AnalyzeNode()
2452 if (OpInfo.hasProperty(SDNPSideEffect)) HasSideEffects = true; in AnalyzeNode()
2453 if (OpInfo.hasProperty(SDNPVariadic)) IsVariadic = true; in AnalyzeNode()
/external/llvm/include/llvm/Bitcode/
DBitCodes.h180 void Add(const BitCodeAbbrevOp &OpInfo) {
181 OperandList.push_back(OpInfo);
/external/llvm/lib/Target/
DTargetInstrInfo.cpp35 short RegClass = MCID.OpInfo[OpNum].RegClass; in getRegClass()
36 if (MCID.OpInfo[OpNum].isLookupPtrRegClass()) in getRegClass()
/external/llvm/lib/Transforms/Utils/
DAddrModeMatcher.cpp385 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i]; in IsOperandAMemoryOperand() local
388 TLI.ComputeConstraintToUse(OpInfo, SDValue()); in IsOperandAMemoryOperand()
392 if (OpInfo.CallOperandVal == OpVal && in IsOperandAMemoryOperand()
393 (OpInfo.ConstraintType != TargetLowering::C_Memory || in IsOperandAMemoryOperand()
394 !OpInfo.isIndirect)) in IsOperandAMemoryOperand()
/external/clang/lib/CodeGen/
DCGExprComplex.cpp602 BinOpInfo OpInfo; in EmitCompoundAssignLValue() local
607 OpInfo.Ty = E->getComputationResultType(); in EmitCompoundAssignLValue()
610 assert(OpInfo.Ty->isAnyComplexType()); in EmitCompoundAssignLValue()
611 assert(CGF.getContext().hasSameUnqualifiedType(OpInfo.Ty, in EmitCompoundAssignLValue()
613 OpInfo.RHS = Visit(E->getRHS()); in EmitCompoundAssignLValue()
620 OpInfo.LHS = EmitComplexToComplexCast(LHSComplexPair, LHSTy, OpInfo.Ty); in EmitCompoundAssignLValue()
623 ComplexPairTy Result = (this->*Func)(OpInfo); in EmitCompoundAssignLValue()
626 Result = EmitComplexToComplexCast(Result, OpInfo.Ty, LHSTy); in EmitCompoundAssignLValue()
DCGExprScalar.cpp1664 BinOpInfo OpInfo; in EmitCompoundAssignLValue() local
1678 OpInfo.RHS = Visit(E->getRHS()); in EmitCompoundAssignLValue()
1679 OpInfo.Ty = E->getComputationResultType(); in EmitCompoundAssignLValue()
1680 OpInfo.Opcode = E->getOpcode(); in EmitCompoundAssignLValue()
1681 OpInfo.E = E; in EmitCompoundAssignLValue()
1684 OpInfo.LHS = EmitLoadOfLValue(LHSLV); in EmitCompoundAssignLValue()
1685 OpInfo.LHS = EmitScalarConversion(OpInfo.LHS, LHSTy, in EmitCompoundAssignLValue()
1689 if (const AtomicType *atomicTy = OpInfo.Ty->getAs<AtomicType>()) { in EmitCompoundAssignLValue()
1696 atomicPHI = Builder.CreatePHI(OpInfo.LHS->getType(), 2); in EmitCompoundAssignLValue()
1697 atomicPHI->addIncoming(OpInfo.LHS, startBB); in EmitCompoundAssignLValue()
[all …]
/external/llvm/lib/MC/
DMCInstrAnalysis.cpp16 Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL) in evaluateBranch()
/external/llvm/lib/Target/ARM/
DThumb2SizeReduction.cpp685 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) in ReduceTo2Addr()
687 if (SkipPred && MCID.OpInfo[i].isPredicate()) in ReduceTo2Addr()
716 if (MCID.OpInfo[i].isPredicate()) in ReduceToNarrow()
726 !MCID.OpInfo[i].isPredicate()) { in ReduceToNarrow()
776 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) in ReduceToNarrow()
786 bool isPred = (i < NumOps && MCID.OpInfo[i].isPredicate()); in ReduceToNarrow()
DARMCodeEmitter.cpp1432 !MCID.OpInfo[OpIdx].isPredicate() && in emitMulFrmInstruction()
1433 !MCID.OpInfo[OpIdx].isOptionalDef()) in emitMulFrmInstruction()
1469 !MCID.OpInfo[OpIdx].isPredicate() && in emitExtendInstruction()
1470 !MCID.OpInfo[OpIdx].isOptionalDef()) in emitExtendInstruction()
1498 MCID.OpInfo[OpIdx].isPredicate() || in emitMiscArithInstruction()
1499 MCID.OpInfo[OpIdx].isOptionalDef()) { in emitMiscArithInstruction()
1716 MCID.OpInfo[OpIdx].isPredicate() || in emitVFPArithInstruction()
1717 MCID.OpInfo[OpIdx].isOptionalDef()) { in emitVFPArithInstruction()
/external/llvm/lib/Transforms/Scalar/
DCodeGenPrepare.cpp964 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i]; in OptimizeInlineAsmInst() local
967 TLI->ComputeConstraintToUse(OpInfo, SDValue()); in OptimizeInlineAsmInst()
969 if (OpInfo.ConstraintType == TargetLowering::C_Memory && in OptimizeInlineAsmInst()
970 OpInfo.isIndirect) { in OptimizeInlineAsmInst()
973 } else if (OpInfo.Type == InlineAsm::isInput) in OptimizeInlineAsmInst()
/external/llvm/lib/CodeGen/
DScheduleDAGInstrs.cpp258 UseMCID.OpInfo[RegUseIndex].isLookupPtrRegClass()) in addPhysRegDataDeps()
345 if (UseMCID.OpInfo[UseMOIdx].isLookupPtrRegClass()) in addPhysRegDeps()
357 UseMCID.OpInfo[UseMOIdx].isLookupPtrRegClass()) { in addPhysRegDeps()
DMachineInstr.cpp1077 if (MCID.OpInfo[i].isPredicate()) in findFirstPredOperandIdx()
1225 if (MCID.OpInfo[i].isPredicate()) { in copyPredicates()
1550 const MCOperandInfo &MCOI = getDesc().OpInfo[i]; in print()
/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCTargetDesc.cpp197 if (Info->get(Inst.getOpcode()).OpInfo[0].OperandType!=MCOI::OPERAND_PCREL) in evaluateBranch()
/external/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp577 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; in AddThumb1SBit() local
582 if (OpInfo[i].isOptionalDef() && OpInfo[i].RegClass == ARM::CCRRegClassID) { in AddThumb1SBit()
583 if (i > 0 && OpInfo[i-1].isPredicate()) continue; in AddThumb1SBit()
644 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; in AddThumbPredicate() local
649 if (OpInfo[i].isPredicate()) { in AddThumbPredicate()
683 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; in UpdateThumbVFPPredicate() local
687 if (OpInfo[i].isPredicate() ) { in UpdateThumbVFPPredicate()

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