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Searched refs:Requires (Results 1 – 25 of 117) sorted by relevance

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/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfoV3.td23 "call $dst", []>, Requires<[HasV3T]>;
40 []>, Requires<[HasV3TOnly]>;
49 []>, Requires<[HasV3T]>;
57 []>, Requires<[HasV3T]>;
66 []>, Requires<[HasV3T]>;
74 []>, Requires<[HasV3T]>;
93 Requires<[HasV3T]>;
103 Requires<[HasV3T]>;
113 // (JMP_RegEzt IntRegs:$src1, bb:$offset)>, Requires<[HasV3T]>;
116 // (JMP_RegNzt IntRegs:$src1, bb:$offset)>, Requires<[HasV3T]>;
[all …]
DHexagonInstrInfoV4.td85 Requires<[HasV4T]>;
92 Requires<[HasV4T]>;
99 Requires<[HasV4T]>;
106 Requires<[HasV4T]>;
113 Requires<[HasV4T]>;
120 Requires<[HasV4T]>;
127 Requires<[HasV4T]>;
134 Requires<[HasV4T]>;
143 Requires<[HasV4T]>;
150 Requires<[HasV4T]>;
[all …]
/external/llvm/lib/Target/X86/
DX86InstrVMX.td21 Requires<[In32BitMode]>;
24 Requires<[In64BitMode]>;
28 Requires<[In32BitMode]>;
31 Requires<[In64BitMode]>;
47 "vmread{q}\t{$src, $dst|$dst, $src}", []>, TB, Requires<[In64BitMode]>;
49 "vmread{q}\t{$src, $dst|$dst, $src}", []>, TB, Requires<[In64BitMode]>;
51 "vmread{l}\t{$src, $dst|$dst, $src}", []>, TB, Requires<[In32BitMode]>;
53 "vmread{l}\t{$src, $dst|$dst, $src}", []>, TB, Requires<[In32BitMode]>;
55 "vmwrite{q}\t{$src, $dst|$dst, $src}", []>, TB, Requires<[In64BitMode]>;
57 "vmwrite{q}\t{$src, $dst|$dst, $src}", []>, TB, Requires<[In64BitMode]>;
[all …]
DX86InstrSVM.td34 "vmrun\t{%eax|EAX}", []>, TB, Requires<[In32BitMode]>;
37 "vmrun\t{%rax|RAX}", []>, TB, Requires<[In64BitMode]>;
42 "vmload\t{%eax|EAX}", []>, TB, Requires<[In32BitMode]>;
45 "vmload\t{%rax|RAX}", []>, TB, Requires<[In64BitMode]>;
50 "vmsave\t{%eax|EAX}", []>, TB, Requires<[In32BitMode]>;
53 "vmsave\t{%rax|RAX}", []>, TB, Requires<[In64BitMode]>;
58 "invlpga\t{%ecx, %eax|EAX, ECX}", []>, TB, Requires<[In32BitMode]>;
61 "invlpga\t{%ecx, %rax|RAX, ECX}", []>, TB, Requires<[In64BitMode]>;
DX86InstrFormats.td343 : I<o, F, outs, ins, asm, pattern, itin>, XS, Requires<[HasSSE1]>;
346 : Ii8<o, F, outs, ins, asm, pattern, itin>, XS, Requires<[HasSSE1]>;
350 Requires<[HasSSE1]>;
354 Requires<[HasSSE1]>;
358 Requires<[HasAVX]>;
362 Requires<[HasAVX]>;
376 : I<o, F, outs, ins, asm, pattern, itin>, XD, Requires<[HasSSE2]>;
379 : Ii8<o, F, outs, ins, asm, pattern, itin>, XD, Requires<[HasSSE2]>;
382 : Ii8<o, F, outs, ins, asm, pattern>, XS, Requires<[HasSSE2]>;
386 Requires<[HasSSE2]>;
[all …]
DX86InstrCompiler.td49 Requires<[In32BitMode]>;
53 Requires<[In32BitMode]>;
65 Requires<[In64BitMode]>;
69 Requires<[In64BitMode]>;
120 Requires<[In32BitMode]>;
127 Requires<[In64BitMode]>;
141 Requires<[In32BitMode]>;
146 Requires<[In32BitMode]>;
306 Requires<[In32BitMode]>;
309 Requires<[In32BitMode]>;
[all …]
DX86InstrControl.td91 "jcxz\t$dst", [], IIC_JCXZ>, AdSize, Requires<[In32BitMode]>;
94 "jecxz\t$dst", [], IIC_JCXZ>, Requires<[In32BitMode]>;
101 "jecxz\t$dst", [], IIC_JCXZ>, AdSize, Requires<[In64BitMode]>;
104 "jrcxz\t$dst", [], IIC_JCXZ>, Requires<[In64BitMode]>;
110 [(brind GR32:$dst)], IIC_JMP_REG>, Requires<[In32BitMode]>;
112 [(brind (loadi32 addr:$dst))], IIC_JMP_MEM>, Requires<[In32BitMode]>;
115 [(brind GR64:$dst)], IIC_JMP_REG>, Requires<[In64BitMode]>;
117 [(brind (loadi64 addr:$dst))], IIC_JMP_MEM>, Requires<[In64BitMode]>;
152 "call{l}\t$dst", [], IIC_CALL_RI>, Requires<[In32BitMode]>;
155 Requires<[In32BitMode]>;
[all …]
DX86InstrSystem.td50 Requires<[In64BitMode]>;
56 Requires<[In64BitMode]>;
61 Requires<[In64BitMode]>;
231 "push{w}\t{%cs|CS}", []>, Requires<[In32BitMode]>, OpSize;
233 "push{l}\t{%cs|CS}", []>, Requires<[In32BitMode]>;
235 "push{w}\t{%ss|SS}", []>, Requires<[In32BitMode]>, OpSize;
237 "push{l}\t{%ss|SS}", []>, Requires<[In32BitMode]>;
239 "push{w}\t{%ds|DS}", []>, Requires<[In32BitMode]>, OpSize;
241 "push{l}\t{%ds|DS}", []>, Requires<[In32BitMode]>;
243 "push{w}\t{%es|ES}", []>, Requires<[In32BitMode]>, OpSize;
[all …]
DX86InstrInfo.td697 (outs), (ins), "leave", []>, Requires<[In32BitMode]>;
701 (outs), (ins), "leave", []>, Requires<[In64BitMode]>;
721 Requires<[In32BitMode]>;
744 Requires<[In32BitMode]>;
775 Requires<[In64BitMode]>;
778 Requires<[In64BitMode]>;
785 Requires<[In32BitMode]>;
790 Requires<[In32BitMode]>;
926 Requires<[In32BitMode]>;
929 Requires<[In32BitMode]>;
[all …]
DX86InstrFPStack.td123 FpI_<outs, ins, fp, pattern>, Requires<[FPStackf32]>;
125 FpI_<outs, ins, fp, pattern>, Requires<[FPStackf64]>;
299 FpI_<outs, ins, fp, pattern>, Requires<[FPStackf32, HasCMov]>;
301 FpI_<outs, ins, fp, pattern>, Requires<[FPStackf64, HasCMov]>;
316 Requires<[HasCMov]>;
586 "fxsaveq\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>;
590 "fxrstorq\t$src", []>, TB, REX_W, Requires<[In64BitMode]>;
614 def : Pat<(f32 fpimmneg0), (CHS_Fp32 (LD_Fp032))>, Requires<[FPStackf32]>;
615 def : Pat<(f32 fpimmneg1), (CHS_Fp32 (LD_Fp132))>, Requires<[FPStackf32]>;
616 def : Pat<(f64 fpimmneg0), (CHS_Fp64 (LD_Fp064))>, Requires<[FPStackf64]>;
[all …]
/external/clang/lib/Basic/
DModule.cpp74 for (unsigned I = 0, N = Current->Requires.size(); I != N; ++I) { in isAvailable()
75 if (!hasFeature(Current->Requires[I], LangOpts, Target)) { in isAvailable()
76 Feature = Current->Requires[I]; in isAvailable()
134 Requires.push_back(Feature); in addRequirement()
193 if (!Requires.empty()) { in print()
196 for (unsigned I = 0, N = Requires.size(); I != N; ++I) { in print()
199 OS << Requires[I]; in print()
/external/llvm/lib/Target/PTX/
DPTXInstrLoadStore.td144 Requires<[Use32BitAddresses]>;
149 Requires<[Use64BitAddresses]>;
154 Requires<[Use32BitAddresses]>;
159 Requires<[Use64BitAddresses]>;
164 Requires<[Use32BitAddresses]>;
169 Requires<[Use64BitAddresses]>;
178 Requires<[Use32BitAddresses]>;
183 Requires<[Use64BitAddresses]>;
188 Requires<[Use32BitAddresses]>;
193 Requires<[Use64BitAddresses]>;
[all …]
/external/llvm/lib/Target/ARM/
DARMInstrVFP.td202 Requires<[HasVFP2]>;
204 Requires<[HasVFP2]>;
206 Requires<[HasVFP2]>;
208 Requires<[HasVFP2]>;
292 (VNMULD DPR:$a, DPR:$b)>, Requires<[NoHonorSignDependentRounding]>;
294 (VNMULS SPR:$a, SPR:$b)>, Requires<[NoHonorSignDependentRounding]>;
953 Requires<[HasVFP2,UseFPVMLx,DontUseFusedMAC]>;
961 Requires<[HasVFP2,DontUseNEONForFP,UseFPVMLx,DontUseFusedMAC]> {
969 Requires<[HasVFP2,UseFPVMLx,DontUseFusedMAC]>;
972 Requires<[HasVFP2,DontUseNEONForFP, UseFPVMLx,DontUseFusedMAC]>;
[all …]
DARMInstrInfo.td1013 Requires<[IsARM]>;
1018 Requires<[IsARM]>;
1023 Requires<[IsARM]>;
1028 Requires<[IsARM]>;
1104 Requires<[IsARM]>;
1109 Requires<[IsARM]>;
1114 Requires<[IsARM]>;
1119 Requires<[IsARM]>;
1258 Requires<[IsARM, HasV6]> {
1271 Requires<[IsARM, HasV6]> {
[all …]
DARMInstrThumb2.td757 Requires<[IsThumb2]> {
767 Requires<[IsThumb2]> {
781 Requires<[IsThumb2]> {
1050 Requires<[IsThumb2]> {
1067 Requires<[HasT2ExtractPack, IsThumb2]> {
1083 Requires<[IsThumb2, HasT2ExtractPack]> {
1101 Requires<[HasT2ExtractPack, IsThumb2]> {
1556 defm t2PLD : T2Ipl<0, 0, "pld">, Requires<[IsThumb2]>;
1557 defm t2PLDW : T2Ipl<1, 0, "pldw">, Requires<[IsThumb2,HasV7,HasMP]>;
1558 defm t2PLI : T2Ipl<0, 1, "pli">, Requires<[IsThumb2,HasV7]>;
[all …]
DARMInstrThumb.td242 Requires<[IsThumb, IsThumb1Only]>;
247 Requires<[IsThumb, IsThumb1Only]>;
258 Requires<[IsThumb2]>;
425 Requires<[IsThumb]> {
439 Requires<[IsThumb, HasV5T]> {
452 Requires<[IsThumb, HasV5T]>,
463 Requires<[IsThumb, IsThumb1Only]>;
510 Requires<[IsThumb]>;
520 Requires<[IsThumb, IsNotIOS]>;
731 Requires<[IsThumb, IsThumb1Only]>;
[all …]
/external/llvm/lib/Target/Mips/
DMips64InstrInfo.td52 def #NAME# : Atomic2Ops<Op, Opstr, CPU64Regs, CPURegs>, Requires<[NotN64]>;
53 def _P8 : Atomic2Ops<Op, Opstr, CPU64Regs, CPU64Regs>, Requires<[IsN64]> {
59 def #NAME# : AtomicCmpSwap<Op, Width, CPU64Regs, CPURegs>, Requires<[NotN64]>;
61 Requires<[IsN64]> {
141 def LLD : LLBase<0x34, "lld", CPU64Regs, mem>, Requires<[NotN64]>;
142 def LLD_P8 : LLBase<0x34, "lld", CPU64Regs, mem64>, Requires<[IsN64]> {
145 def SCD : SCBase<0x3c, "scd", CPU64Regs, mem>, Requires<[NotN64]>;
146 def SCD_P8 : SCBase<0x3c, "scd", CPU64Regs, mem64>, Requires<[IsN64]> {
190 Requires<[IsN64]> {
273 def : Pat<(MipsDynAlloc addr:$f), (DynAlloc64 addr:$f)>, Requires<[IsN64]>;
[all …]
DMipsInstrInfo.td433 Requires<[NotN64]>;
435 Requires<[IsN64]> {
445 Requires<[NotN64]>;
447 Requires<[IsN64]> {
456 Requires<[NotN64]>;
458 Requires<[IsN64]> {
467 Requires<[NotN64]>;
469 Requires<[IsN64]> {
479 Requires<[NotN64]>;
481 Requires<[IsN64]> {
[all …]
DMipsInstrFPU.td120 Requires<[NotFP64bit]>;
122 Requires<[IsFP64bit]> {
138 Requires<[NotFP64bit]>;
140 Requires<[IsFP64bit]> {
149 Requires<[NotFP64bit]>;
151 Requires<[IsFP64bit]> {
245 Requires<[NotFP64bit]>;
247 Requires<[IsFP64bit]> {
394 def FCMP_D32 : FCMP<0x11, AFGR64, "d">, Requires<[NotFP64bit]>;
395 def FCMP_D64 : FCMP<0x11, FGR64, "d">, Requires<[IsFP64bit]> {
/external/webkit/LayoutTests/platform/android/
Dtest_expectations.txt43 fast/dom/HTMLLinkElement/link-and-subresource-test.html FAIL // Requires layoutTestController.dumpR…
44 fast/dom/HTMLLinkElement/prefetch.html FAIL // Requires layoutTestController.dumpResourceResponseMI…
47 fast/encoding/mailto-always-utf-8.html FAIL // Requires waitForPolicyDelegate(), see http://b/issue…
56 storage/open-database-creation-callback-isolated-world.html FAIL // Requires layoutTestController.e…
57 storage/statement-error-callback-isolated-world.html FAIL // Requires layoutTestController.evaluate…
58 storage/statement-success-callback-isolated-world.html FAIL // Requires layoutTestController.evalua…
59 storage/transaction-callback-isolated-world.html FAIL // Requires layoutTestController.evaluateScri…
60 storage/transaction-error-callback-isolated-world.html FAIL // Requires layoutTestController.evalua…
61 storage/transaction-success-callback-isolated-world.html FAIL // Requires layoutTestController.eval…
67 fast/events/touch/basic-multi-touch-events.html FAIL // Requires multi-touch gestures not supported…
[all …]
/external/bluetooth/glib/
Dgthread-2.0.pc.in8 Requires: glib-2.0
Dgobject-2.0.pc.in8 Requires: glib-2.0
/external/e2fsprogs/lib/uuid/
Duuid.pc.in9 Requires:
/external/e2fsprogs/lib/ext2fs/
Dext2fs.pc.in9 Requires.private: com_err
/external/e2fsprogs/lib/e2p/
De2p.pc.in9 Requires:

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