| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 293 SCALAR_TO_VECTOR, enumerator
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| /external/llvm/lib/Target/PowerPC/ |
| D | README_ALTIVEC.txt | 61 We currently codegen SCALAR_TO_VECTOR as a store of the scalar to a 16-byte
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| D | PPCISelLowering.cpp | 353 setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Expand); in PPCTargetLowering()
383 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4f32, Custom); in PPCTargetLowering()
384 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4i32, Custom); in PPCTargetLowering()
4593 case ISD::SCALAR_TO_VECTOR: return LowerSCALAR_TO_VECTOR(Op, DAG); in LowerOperation()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 802 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v8i8, Expand); in X86TargetLowering()
803 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4i16, Expand); in X86TargetLowering()
804 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v2i32, Expand); in X86TargetLowering()
805 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v1i64, Expand); in X86TargetLowering()
865 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v16i8, Custom); in X86TargetLowering()
866 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v8i16, Custom); in X86TargetLowering()
1143 setOperationAction(ISD::SCALAR_TO_VECTOR, SVT, Custom); in X86TargetLowering()
1538 ValToCopy = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, in LowerReturn()
2238 Arg = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, Arg); in LowerCall()
4054 if (N->getOpcode() != ISD::SCALAR_TO_VECTOR) in isScalarLoadToVector()
[all …]
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| D | X86ISelDAGToDAG.cpp | 1321 if (N.getOpcode() == ISD::SCALAR_TO_VECTOR) { in SelectScalarSSELoad()
1338 N.getOperand(0).getOpcode() == ISD::SCALAR_TO_VECTOR && in SelectScalarSSELoad()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 59 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break; in ScalarizeVectorResult()
465 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break; in SplitVectorResult()
734 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0)); in SplitVecRes_SCALAR_TO_VECTOR()
1250 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break; in WidenVectorResult()
1921 return DAG.getNode(ISD::SCALAR_TO_VECTOR, N->getDebugLoc(), in WidenVecRes_SCALAR_TO_VECTOR()
2283 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]); in BuildVectorFromScalar()
2338 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp); in GenWidenVectorLoads()
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| D | SelectionDAGDumper.cpp | 195 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; in getOperationName()
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| D | LegalizeDAG.cpp | 615 SDValue ScVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, in ExpandINSERT_VECTOR_ELT()
1703 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Node->getOperand(0)); in ExpandBUILD_VECTOR()
1748 SDValue Vec1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value1); in ExpandBUILD_VECTOR()
1751 Vec2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value2); in ExpandBUILD_VECTOR()
2799 case ISD::SCALAR_TO_VECTOR: in ExpandNode()
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| D | LegalizeIntegerTypes.cpp | 88 case ISD::SCALAR_TO_VECTOR: in PromoteIntegerResult()
775 case ISD::SCALAR_TO_VECTOR: in PromoteIntegerOperand()
2450 case ISD::SCALAR_TO_VECTOR: Res = ExpandOp_SCALAR_TO_VECTOR(N); break; in ExpandIntegerOperand()
2941 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NOutVT, Op); in PromoteIntRes_SCALAR_TO_VECTOR()
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| D | DAGCombiner.cpp | 2343 if ((N0.getOpcode() == ISD::BITCAST || N0.getOpcode() == ISD::SCALAR_TO_VECTOR) in SimplifyBinOpWithSameOpcodeHands()
5483 if (BV->getOpcode() == ISD::SCALAR_TO_VECTOR) in ConstantFoldBITCASTofBUILD_VECTOR()
5484 return DAG.getNode(ISD::SCALAR_TO_VECTOR, BV->getDebugLoc(), VT, in ConstantFoldBITCASTofBUILD_VECTOR()
5583 return DAG.getNode(ISD::SCALAR_TO_VECTOR, BV->getDebugLoc(), VT, in ConstantFoldBITCASTofBUILD_VECTOR()
7286 if (InVec.getOpcode() == ISD::SCALAR_TO_VECTOR) { in visitEXTRACT_VECTOR_ELT()
7369 } else if (InVec.getOpcode() == ISD::SCALAR_TO_VECTOR && in visitEXTRACT_VECTOR_ELT()
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| D | SelectionDAG.cpp | 202 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) in isScalarToVector()
2574 case ISD::SCALAR_TO_VECTOR: in getNode()
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| /external/llvm/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 444 setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Custom); in SPUTargetLowering()
455 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4f32, Custom); in SPUTargetLowering()
896 SDValue vectorizeOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, vecVT, in LowerSTORE()
2187 DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, ValOp), in LowerINSERT_VECTOR_ELT()
2827 case ISD::SCALAR_TO_VECTOR: in LowerOperation()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 458 def scalar_to_vector : SDNode<"ISD::SCALAR_TO_VECTOR", SDTypeProfile<1, 1, []>,
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 3231 Tmp0 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp0); in LowerFCOPYSIGN()
3233 Tmp1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp1); in LowerFCOPYSIGN()
4164 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value); in LowerBUILD_VECTOR()
4528 if (Lane == 0 && V1.getOpcode() == ISD::SCALAR_TO_VECTOR) { in LowerVECTOR_SHUFFLE()
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