| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 735 SETLE, // 1 X 1 0 1 True if less than or equal enumerator
745 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
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| /external/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 179 case ISD::SETOLE: case ISD::SETULE: return ISD::SETLE; in getFCmpCodeWithoutNaN()
193 case ICmpInst::ICMP_SLE: return ISD::SETLE; in getICmpCondCode()
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| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeInstrInfo.td | 773 def : Pat<(setcc (i32 GPR:$L), (i32 0), SETLE),
798 def : Pat<(setcc (i32 0), (i32 GPR:$R), SETLE),
828 def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETLE),
865 (i32 GPR:$T), (i32 GPR:$F), SETLE),
896 (i32 GPR:$T), (i32 GPR:$F), SETLE),
927 (i32 GPR:$T), (i32 GPR:$F), SETLE),
961 def : Pat<(brcond (setcc (i32 GPR:$L), (i32 0), SETLE), bb:$T),
982 def : Pat<(brcond (setcc (i32 0), (i32 GPR:$R), SETLE), bb:$T),
1003 def : Pat<(brcond (setcc (i32 GPR:$L), (i32 GPR:$R), SETLE), bb:$T),
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| D | MBlazeInstrFPU.td | 166 def : Pat<(setcc (f32 GPR:$L), (f32 GPR:$R), SETLE),
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSelectCCInfo.td | 49 IntRegs:$fval, SETLE)),
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrCMovSetCC.td | 108 defm SETLE : SETCC<0x9E, "setle", X86_COND_LE>; // signed less than or equal
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| D | X86ISelLowering.cpp | 3071 case ISD::SETLE: return X86::COND_LE; in TranslateX86CC()
3120 case ISD::SETLE: return X86::COND_BE; in TranslateX86CC()
8418 case ISD::SETLE: in LowerVSETCC()
8473 case ISD::SETLE: Opc = X86ISD::PCMPGT; Invert = true; break; in LowerVSETCC()
9282 CC = ISD::SETLE; in LowerINTRINSIC_WO_CHAIN()
9312 CC = ISD::SETLE; in LowerINTRINSIC_WO_CHAIN()
13331 case ISD::SETLE: in PerformSELECTCombine()
13423 case ISD::SETLE: in PerformSELECTCombine()
13549 ISD::CondCode NewCC = (CC == ISD::SETLT) ? ISD::SETLE : ISD::SETGE; in PerformSELECTCombine()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 511 CCs[RTLIB::OLE_F32] = ISD::SETLE; in InitCmpLibcallCCs()
512 CCs[RTLIB::OLE_F64] = ISD::SETLE; in InitCmpLibcallCCs()
2112 case ISD::SETLE: in SimplifySetCC()
2266 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { in SimplifySetCC()
2271 (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT); in SimplifySetCC()
2280 if ((Cond == ISD::SETLE || Cond == ISD::SETULE) && C1 == MaxVal) in SimplifySetCC()
2606 case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> ~Y | X in SimplifySetCC()
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| D | SelectionDAGDumper.cpp | 304 case ISD::SETLE: return "setle"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 836 case ISD::SETLE: in PromoteSetCCOperands()
2532 case ISD::SETLE: in IntegerExpandSetCCOperands()
2562 (CCCode == ISD::SETLE || CCCode == ISD::SETGE || in IntegerExpandSetCCOperands()
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| D | LegalizeFloatTypes.cpp | 639 case ISD::SETLE: in SoftenSetCCOperands()
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| D | SelectionDAG.cpp | 257 case ISD::SETLE: in isSignedOp()
1551 case ISD::SETLE: return getConstant(C1.sle(C2), VT); in FoldSetCC()
1582 case ISD::SETLE: if (R==APFloat::cmpUnordered) in FoldSetCC()
|
| D | LegalizeDAG.cpp | 1577 case ISD::SETOLE: CC1 = ISD::SETLE; CC2 = ISD::SETO; Opc = ISD::AND; break; in LegalizeSetCCCondCode()
1583 case ISD::SETULE: CC1 = ISD::SETLE; CC2 = ISD::SETUO; Opc = ISD::OR; break; in LegalizeSetCCCondCode()
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| D | SelectionDAGBuilder.cpp | 1581 assert(CB.CC == ISD::SETLE && "Can handle only LE ranges now"); in visitSwitchCase()
1591 ISD::SETLE); in visitSwitchCase()
2009 CC = ISD::SETLE; in handleSmallSwitchRange()
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| D | DAGCombiner.cpp | 8233 if ((CC == ISD::SETLT || CC == ISD::SETLE) && in SimplifySelectCC()
8459 else if (((N1C->isNullValue() && (CC == ISD::SETLT || CC == ISD::SETLE)) || in SimplifySelectCC()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 558 case ISD::SETLE: return PPC::PRED_LE; in getPredicateForSetCC()
592 case ISD::SETLE: Invert = true; return 1; // !Bit #1 = SETULE in getCRIdxForSetCC()
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| D | PPCISelLowering.cpp | 3654 case ISD::SETLE: in LowerSELECT_CC()
3683 case ISD::SETLE: in LowerSELECT_CC()
3925 Tmp4, Tmp6, ISD::SETLE); in LowerSRA_PARTS()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 651 case ISD::SETLE: return SPCC::ICC_LE; in IntCondCCodeToICC()
673 case ISD::SETLE: in FPCondCCodeToFCC()
|
| /external/llvm/lib/Target/PTX/ |
| D | PTXInstrInfo.td | 554 defm SETPLEs16 : PTX_SETP_I<RegI16, "s16", i16imm, SETLE, "le">;
567 defm SETPLEs32 : PTX_SETP_I<RegI32, "s32", i32imm, SETLE, "le">;
580 defm SETPLEs64 : PTX_SETP_I<RegI64, "s64", i64imm, SETLE, "le">;
|
| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 500 def SETLT : CondCode; def SETLE : CondCode; def SETNE : CondCode;
853 (setcc node:$lhs, node:$rhs, SETLE)>;
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1092 case ISD::SETLE: return ARMCC::LE; in IntCCToARMCC()
1122 case ISD::SETLE: in FPCCToARMCC()
2749 CC = (CC == ISD::SETLT) ? ISD::SETLE : ISD::SETGT; in getARMCmp()
2760 case ISD::SETLE: in getARMCmp()
2763 CC = (CC == ISD::SETLE) ? ISD::SETLT : ISD::SETGE; in getARMCmp()
3580 case ISD::SETLE: Swap = true; // Fallthrough in LowerVSETCC()
3614 case ISD::SETLE: Swap = true; in LowerVSETCC()
8294 case ISD::SETLE: in PerformSELECT_CCCombine()
8306 if ((CC == ISD::SETLE || CC == ISD::SETOLE || CC == ISD::SETULE) && in PerformSELECT_CCCombine()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 709 case ISD::SETLE: in EmitCMP()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 517 case ISD::SETLE: in FPCondCCodeToFCC()
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| /external/llvm/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 2600 compareOp = ISD::SETLE; break; in LowerSETCC()
|