Searched refs:SETUNE (Results 1 – 18 of 18) sorted by relevance
| /external/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 168 case FCmpInst::FCMP_UNE: return ISD::SETUNE; in getFCmpCondCode()
177 case ISD::SETONE: case ISD::SETUNE: return ISD::SETNE; in getFCmpCodeWithoutNaN()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 727 SETUNE, // 1 1 1 0 True if unordered or not equal enumerator
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| /external/llvm/lib/Target/CellSPU/ |
| D | README.txt | 80 SETUNE unimplemented
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| D | SPUISelLowering.cpp | 2601 case ISD::SETUNE: in LowerSETCC()
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| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeInstrFPU.td | 185 def : Pat<(setcc (f32 GPR:$L), (f32 GPR:$R), SETUNE),
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 553 case ISD::SETUNE: in getPredicateForSetCC()
593 case ISD::SETUNE: in getCRIdxForSetCC()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 298 case ISD::SETUNE: return "setune"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 628 case ISD::SETUNE: in SoftenSetCCOperands()
1315 LHSHi, RHSHi, ISD::SETUNE); in FloatExpandSetCCOperands()
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| D | TargetLowering.cpp | 2389 if (Cond == ISD::SETUNE && in SimplifySetCC()
2402 if (Cond == ISD::SETUNE && in SimplifySetCC()
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| D | SelectionDAG.cpp | 285 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT in getSetCCOrOperation()
1531 case ISD::SETUNE: in FoldSetCC()
1596 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); in FoldSetCC()
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| D | LegalizeDAG.cpp | 1584 case ISD::SETUNE: CC1 = ISD::SETNE; CC2 = ISD::SETUO; Opc = ISD::OR; break; in LegalizeSetCCCondCode()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 497 def SETULT : CondCode; def SETULE : CondCode; def SETUNE : CondCode;
843 (setcc node:$lhs, node:$rhs, SETUNE)>;
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| /external/llvm/lib/Target/PTX/ |
| D | PTXInstrInfo.td | 587 defm SETPNEf32 : PTX_SETP_FP<RegF32, "f32", f32imm, SETUNE, SETONE, "ne">;
596 defm SETPNEf64 : PTX_SETP_FP<RegF64, "f64", f64imm, SETUNE, SETONE, "ne">;
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1141 setCondCodeAction(ISD::SETUNE, MVT::f64, Expand); in HexagonTargetLowering()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 668 case ISD::SETUNE: return SPCC::FCC_NE; in FPCondCCodeToFCC()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1125 case ISD::SETUNE: CondCode = ARMCC::NE; break; in FPCCToARMCC()
3001 else if (CC == ISD::SETUNE) in OptimizeVFPBrcond()
3053 CC == ISD::SETNE || CC == ISD::SETUNE)) { in LowerBR_CC()
3571 case ISD::SETUNE: in LowerVSETCC()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 239 setCondCodeAction(ISD::SETUNE, MVT::f32, Expand); in X86TargetLowering()
240 setCondCodeAction(ISD::SETUNE, MVT::f64, Expand); in X86TargetLowering()
241 setCondCodeAction(ISD::SETUNE, MVT::f80, Expand); in X86TargetLowering()
3126 case ISD::SETUNE: return X86::COND_INVALID; in TranslateX86CC()
8421 case ISD::SETUNE: in LowerVSETCC()
8931 cast<CondCodeSDNode>(Cond.getOperand(2))->get() == ISD::SETUNE) { in LowerBRCOND()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 512 case ISD::SETUNE: return Mips::FCOND_UNE; in FPCondCCodeToFCC()
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