| /external/llvm/lib/Target/CellSPU/ |
| D | SPUInstrInfo.h | 44 unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | SPUInstrInfo.cpp | 98 SPUInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in SPUInstrInfo
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.h | 49 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | XCoreInstrInfo.cpp | 78 XCoreInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in XCoreInstrInfo
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcInstrInfo.h | 62 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | SparcInstrInfo.cpp | 59 unsigned SparcInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in SparcInstrInfo
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.h | 60 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | MipsInstrInfo.cpp | 74 isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const in isStoreToStackSlot() function in MipsInstrInfo
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.h | 97 unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | README_ALTIVEC.txt | 3 Implement PPCInstrInfo::isLoadFromStackSlot/isStoreToStackSlot for vector
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| D | PPCInstrInfo.cpp | 96 unsigned PPCInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in PPCInstrInfo
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| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeInstrInfo.h | 194 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | MBlazeInstrInfo.cpp | 63 isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const { in isStoreToStackSlot() function in MBlazeInstrInfo
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.h | 53 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | HexagonInstrInfo.cpp | 98 unsigned HexagonInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in HexagonInstrInfo
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.h | 177 unsigned isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const;
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| D | X86InstrInfo.cpp | 1290 unsigned X86InstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in X86InstrInfo
1303 if ((Reg = isStoreToStackSlot(MI, FrameIndex))) in isStoreToStackSlotPostFE()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 102 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | ARMBaseInstrInfo.cpp | 843 ARMBaseInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in ARMBaseInstrInfo
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| /external/llvm/lib/CodeGen/ |
| D | InlineSpiller.cpp | 254 if (SnipLI.reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) in isSnippet()
784 if (Reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) { in eliminateRedundantSpills()
986 InstrReg = TII.isStoreToStackSlot(MI, FI); in coalesceStackAccess()
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| D | StackSlotColoring.cpp | 369 if (!(StoreReg = TII->isStoreToStackSlot(NextMI, SecondSS))) continue; in RemoveDeadStores()
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| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 152 virtual unsigned isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function
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