1 //===-- MBlazeMCCodeEmitter.cpp - Convert MBlaze code to machine code -----===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the MBlazeMCCodeEmitter class.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #define DEBUG_TYPE "mccodeemitter"
15 #include "MCTargetDesc/MBlazeBaseInfo.h"
16 #include "MCTargetDesc/MBlazeMCTargetDesc.h"
17 #include "llvm/MC/MCCodeEmitter.h"
18 #include "llvm/MC/MCExpr.h"
19 #include "llvm/MC/MCInst.h"
20 #include "llvm/MC/MCInstrInfo.h"
21 #include "llvm/MC/MCSubtargetInfo.h"
22 #include "llvm/MC/MCSymbol.h"
23 #include "llvm/MC/MCFixup.h"
24 #include "llvm/ADT/Statistic.h"
25 #include "llvm/Support/raw_ostream.h"
26 using namespace llvm;
27
28 STATISTIC(MCNumEmitted, "Number of MC instructions emitted");
29
30 namespace {
31 class MBlazeMCCodeEmitter : public MCCodeEmitter {
32 MBlazeMCCodeEmitter(const MBlazeMCCodeEmitter &); // DO NOT IMPLEMENT
33 void operator=(const MBlazeMCCodeEmitter &); // DO NOT IMPLEMENT
34 const MCInstrInfo &MCII;
35
36 public:
MBlazeMCCodeEmitter(const MCInstrInfo & mcii,const MCSubtargetInfo & sti,MCContext & ctx)37 MBlazeMCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti,
38 MCContext &ctx)
39 : MCII(mcii) {
40 }
41
~MBlazeMCCodeEmitter()42 ~MBlazeMCCodeEmitter() {}
43
44 // getBinaryCodeForInstr - TableGen'erated function for getting the
45 // binary encoding for an instruction.
46 uint64_t getBinaryCodeForInstr(const MCInst &MI) const;
47
48 /// getMachineOpValue - Return binary encoding of operand. If the machine
49 /// operand requires relocation, record the relocation and return zero.
50 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO) const;
getMachineOpValue(const MCInst & MI,unsigned OpIdx) const51 unsigned getMachineOpValue(const MCInst &MI, unsigned OpIdx) const {
52 return getMachineOpValue(MI, MI.getOperand(OpIdx));
53 }
54
GetMBlazeRegNum(const MCOperand & MO)55 static unsigned GetMBlazeRegNum(const MCOperand &MO) {
56 // FIXME: getMBlazeRegisterNumbering() is sufficient?
57 llvm_unreachable("MBlazeMCCodeEmitter::GetMBlazeRegNum() not yet "
58 "implemented.");
59 }
60
EmitByte(unsigned char C,unsigned & CurByte,raw_ostream & OS) const61 void EmitByte(unsigned char C, unsigned &CurByte, raw_ostream &OS) const {
62 // The MicroBlaze uses a bit reversed format so we need to reverse the
63 // order of the bits. Taken from:
64 // http://graphics.stanford.edu/~seander/bithacks.html
65 C = ((C * 0x80200802ULL) & 0x0884422110ULL) * 0x0101010101ULL >> 32;
66
67 OS << (char)C;
68 ++CurByte;
69 }
70
EmitRawByte(unsigned char C,unsigned & CurByte,raw_ostream & OS) const71 void EmitRawByte(unsigned char C, unsigned &CurByte, raw_ostream &OS) const {
72 OS << (char)C;
73 ++CurByte;
74 }
75
EmitConstant(uint64_t Val,unsigned Size,unsigned & CurByte,raw_ostream & OS) const76 void EmitConstant(uint64_t Val, unsigned Size, unsigned &CurByte,
77 raw_ostream &OS) const {
78 assert(Size <= 8 && "size too big in emit constant");
79
80 for (unsigned i = 0; i != Size; ++i) {
81 EmitByte(Val & 255, CurByte, OS);
82 Val >>= 8;
83 }
84 }
85
86 void EmitIMM(const MCOperand &imm, unsigned &CurByte, raw_ostream &OS) const;
87 void EmitIMM(const MCInst &MI, unsigned &CurByte, raw_ostream &OS) const;
88
89 void EmitImmediate(const MCInst &MI, unsigned opNo, bool pcrel,
90 unsigned &CurByte, raw_ostream &OS,
91 SmallVectorImpl<MCFixup> &Fixups) const;
92
93 void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
94 SmallVectorImpl<MCFixup> &Fixups) const;
95 };
96
97 } // end anonymous namespace
98
99
createMBlazeMCCodeEmitter(const MCInstrInfo & MCII,const MCSubtargetInfo & STI,MCContext & Ctx)100 MCCodeEmitter *llvm::createMBlazeMCCodeEmitter(const MCInstrInfo &MCII,
101 const MCSubtargetInfo &STI,
102 MCContext &Ctx) {
103 return new MBlazeMCCodeEmitter(MCII, STI, Ctx);
104 }
105
106 /// getMachineOpValue - Return binary encoding of operand. If the machine
107 /// operand requires relocation, record the relocation and return zero.
getMachineOpValue(const MCInst & MI,const MCOperand & MO) const108 unsigned MBlazeMCCodeEmitter::getMachineOpValue(const MCInst &MI,
109 const MCOperand &MO) const {
110 if (MO.isReg())
111 return getMBlazeRegisterNumbering(MO.getReg());
112 if (MO.isImm())
113 return static_cast<unsigned>(MO.getImm());
114 if (MO.isExpr())
115 return 0; // The relocation has already been recorded at this point.
116 #ifndef NDEBUG
117 errs() << MO;
118 #endif
119 llvm_unreachable(0);
120 }
121
122 void MBlazeMCCodeEmitter::
EmitIMM(const MCOperand & imm,unsigned & CurByte,raw_ostream & OS) const123 EmitIMM(const MCOperand &imm, unsigned &CurByte, raw_ostream &OS) const {
124 int32_t val = (int32_t)imm.getImm();
125 if (val > 32767 || val < -32768) {
126 EmitByte(0x0D, CurByte, OS);
127 EmitByte(0x00, CurByte, OS);
128 EmitRawByte((val >> 24) & 0xFF, CurByte, OS);
129 EmitRawByte((val >> 16) & 0xFF, CurByte, OS);
130 }
131 }
132
133 void MBlazeMCCodeEmitter::
EmitIMM(const MCInst & MI,unsigned & CurByte,raw_ostream & OS) const134 EmitIMM(const MCInst &MI, unsigned &CurByte,raw_ostream &OS) const {
135 switch (MI.getOpcode()) {
136 default: break;
137
138 case MBlaze::ADDIK32:
139 case MBlaze::ORI32:
140 case MBlaze::BRLID32:
141 EmitByte(0x0D, CurByte, OS);
142 EmitByte(0x00, CurByte, OS);
143 EmitRawByte(0, CurByte, OS);
144 EmitRawByte(0, CurByte, OS);
145 }
146 }
147
148 void MBlazeMCCodeEmitter::
EmitImmediate(const MCInst & MI,unsigned opNo,bool pcrel,unsigned & CurByte,raw_ostream & OS,SmallVectorImpl<MCFixup> & Fixups) const149 EmitImmediate(const MCInst &MI, unsigned opNo, bool pcrel, unsigned &CurByte,
150 raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups) const {
151 assert(MI.getNumOperands()>opNo && "Not enought operands for instruction");
152
153 MCOperand oper = MI.getOperand(opNo);
154
155 if (oper.isImm()) {
156 EmitIMM(oper, CurByte, OS);
157 } else if (oper.isExpr()) {
158 MCFixupKind FixupKind;
159 switch (MI.getOpcode()) {
160 default:
161 FixupKind = pcrel ? FK_PCRel_2 : FK_Data_2;
162 Fixups.push_back(MCFixup::Create(0,oper.getExpr(),FixupKind));
163 break;
164 case MBlaze::ORI32:
165 case MBlaze::ADDIK32:
166 case MBlaze::BRLID32:
167 FixupKind = pcrel ? FK_PCRel_4 : FK_Data_4;
168 Fixups.push_back(MCFixup::Create(0,oper.getExpr(),FixupKind));
169 break;
170 }
171 }
172 }
173
174
175
176 void MBlazeMCCodeEmitter::
EncodeInstruction(const MCInst & MI,raw_ostream & OS,SmallVectorImpl<MCFixup> & Fixups) const177 EncodeInstruction(const MCInst &MI, raw_ostream &OS,
178 SmallVectorImpl<MCFixup> &Fixups) const {
179 unsigned Opcode = MI.getOpcode();
180 const MCInstrDesc &Desc = MCII.get(Opcode);
181 uint64_t TSFlags = Desc.TSFlags;
182 // Keep track of the current byte being emitted.
183 unsigned CurByte = 0;
184
185 // Emit an IMM instruction if the instruction we are encoding requires it
186 EmitIMM(MI,CurByte,OS);
187
188 switch ((TSFlags & MBlazeII::FormMask)) {
189 default: break;
190 case MBlazeII::FPseudo:
191 // Pseudo instructions don't get encoded.
192 return;
193 case MBlazeII::FRRI:
194 EmitImmediate(MI, 2, false, CurByte, OS, Fixups);
195 break;
196 case MBlazeII::FRIR:
197 EmitImmediate(MI, 1, false, CurByte, OS, Fixups);
198 break;
199 case MBlazeII::FCRI:
200 EmitImmediate(MI, 1, true, CurByte, OS, Fixups);
201 break;
202 case MBlazeII::FRCI:
203 EmitImmediate(MI, 1, true, CurByte, OS, Fixups);
204 case MBlazeII::FCCI:
205 EmitImmediate(MI, 0, true, CurByte, OS, Fixups);
206 break;
207 }
208
209 ++MCNumEmitted; // Keep track of the # of mi's emitted
210 unsigned Value = getBinaryCodeForInstr(MI);
211 EmitConstant(Value, 4, CurByte, OS);
212 }
213
214 // FIXME: These #defines shouldn't be necessary. Instead, tblgen should
215 // be able to generate code emitter helpers for either variant, like it
216 // does for the AsmWriter.
217 #define MBlazeCodeEmitter MBlazeMCCodeEmitter
218 #define MachineInstr MCInst
219 #include "MBlazeGenCodeEmitter.inc"
220 #undef MBlazeCodeEmitter
221 #undef MachineInstr
222