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1 //===--  MipsExpandPseudo.cpp - Expand Pseudo Instructions ----------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This pass expands pseudo instructions into target instructions after register
11 // allocation but before post-RA scheduling.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #define DEBUG_TYPE "mips-expand-pseudo"
16 
17 #include "Mips.h"
18 #include "MipsTargetMachine.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/MachineInstrBuilder.h"
21 #include "llvm/Target/TargetInstrInfo.h"
22 #include "llvm/ADT/Statistic.h"
23 
24 using namespace llvm;
25 
26 namespace {
27   struct MipsExpandPseudo : public MachineFunctionPass {
28 
29     TargetMachine &TM;
30     const TargetInstrInfo *TII;
31 
32     static char ID;
MipsExpandPseudo__anonf12da0fd0111::MipsExpandPseudo33     MipsExpandPseudo(TargetMachine &tm)
34       : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
35 
getPassName__anonf12da0fd0111::MipsExpandPseudo36     virtual const char *getPassName() const {
37       return "Mips PseudoInstrs Expansion";
38     }
39 
40     bool runOnMachineFunction(MachineFunction &F);
41     bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
42 
43   private:
44     void ExpandBuildPairF64(MachineBasicBlock&, MachineBasicBlock::iterator);
45     void ExpandExtractElementF64(MachineBasicBlock&,
46                                  MachineBasicBlock::iterator);
47   };
48   char MipsExpandPseudo::ID = 0;
49 } // end of anonymous namespace
50 
runOnMachineFunction(MachineFunction & F)51 bool MipsExpandPseudo::runOnMachineFunction(MachineFunction& F) {
52   bool Changed = false;
53 
54   for (MachineFunction::iterator I = F.begin(); I != F.end(); ++I)
55     Changed |= runOnMachineBasicBlock(*I);
56 
57   return Changed;
58 }
59 
runOnMachineBasicBlock(MachineBasicBlock & MBB)60 bool MipsExpandPseudo::runOnMachineBasicBlock(MachineBasicBlock& MBB) {
61 
62   bool Changed = false;
63   for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end();) {
64     const MCInstrDesc& MCid = I->getDesc();
65 
66     switch(MCid.getOpcode()) {
67     default:
68       ++I;
69       continue;
70     case Mips::SETGP2:
71       // Convert "setgp2 $globalreg, $t9" to "addu $globalreg, $v0, $t9"
72       BuildMI(MBB, I, I->getDebugLoc(), TII->get(Mips::ADDu),
73               I->getOperand(0).getReg())
74         .addReg(Mips::V0).addReg(I->getOperand(1).getReg());
75       break;
76     case Mips::BuildPairF64:
77       ExpandBuildPairF64(MBB, I);
78       break;
79     case Mips::ExtractElementF64:
80       ExpandExtractElementF64(MBB, I);
81       break;
82     }
83 
84     // delete original instr
85     MBB.erase(I++);
86     Changed = true;
87   }
88 
89   return Changed;
90 }
91 
ExpandBuildPairF64(MachineBasicBlock & MBB,MachineBasicBlock::iterator I)92 void MipsExpandPseudo::ExpandBuildPairF64(MachineBasicBlock& MBB,
93                                             MachineBasicBlock::iterator I) {
94   unsigned DstReg = I->getOperand(0).getReg();
95   unsigned LoReg = I->getOperand(1).getReg(), HiReg = I->getOperand(2).getReg();
96   const MCInstrDesc& Mtc1Tdd = TII->get(Mips::MTC1);
97   DebugLoc dl = I->getDebugLoc();
98   const uint16_t* SubReg =
99     TM.getRegisterInfo()->getSubRegisters(DstReg);
100 
101   // mtc1 Lo, $fp
102   // mtc1 Hi, $fp + 1
103   BuildMI(MBB, I, dl, Mtc1Tdd, *SubReg).addReg(LoReg);
104   BuildMI(MBB, I, dl, Mtc1Tdd, *(SubReg + 1)).addReg(HiReg);
105 }
106 
ExpandExtractElementF64(MachineBasicBlock & MBB,MachineBasicBlock::iterator I)107 void MipsExpandPseudo::ExpandExtractElementF64(MachineBasicBlock& MBB,
108                                                MachineBasicBlock::iterator I) {
109   unsigned DstReg = I->getOperand(0).getReg();
110   unsigned SrcReg = I->getOperand(1).getReg();
111   unsigned N = I->getOperand(2).getImm();
112   const MCInstrDesc& Mfc1Tdd = TII->get(Mips::MFC1);
113   DebugLoc dl = I->getDebugLoc();
114   const uint16_t* SubReg = TM.getRegisterInfo()->getSubRegisters(SrcReg);
115 
116   BuildMI(MBB, I, dl, Mfc1Tdd, DstReg).addReg(*(SubReg + N));
117 }
118 
119 /// createMipsMipsExpandPseudoPass - Returns a pass that expands pseudo
120 /// instrs into real instrs
createMipsExpandPseudoPass(MipsTargetMachine & tm)121 FunctionPass *llvm::createMipsExpandPseudoPass(MipsTargetMachine &tm) {
122   return new MipsExpandPseudo(tm);
123 }
124