1; RUN: llc < %s -mtriple=armv7-apple-ios | FileCheck %s 2 3@in = global float 0x400921FA00000000, align 4 4 5; Test signed conversion. 6; CHECK: t0 7; CHECK-NOT: vmul 8define void @t0() nounwind { 9entry: 10 %tmp = load float* @in, align 4, !tbaa !0 11 %vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0 12 %vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1 13 %mul.i = fmul <2 x float> %vecinit2.i, <float 8.000000e+00, float 8.000000e+00> 14 %vcvt.i = fptosi <2 x float> %mul.i to <2 x i32> 15 tail call void @foo_int32x2_t(<2 x i32> %vcvt.i) nounwind 16 ret void 17} 18 19declare void @foo_int32x2_t(<2 x i32>) 20 21; Test unsigned conversion. 22; CHECK: t1 23; CHECK-NOT: vmul 24define void @t1() nounwind { 25entry: 26 %tmp = load float* @in, align 4, !tbaa !0 27 %vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0 28 %vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1 29 %mul.i = fmul <2 x float> %vecinit2.i, <float 8.000000e+00, float 8.000000e+00> 30 %vcvt.i = fptoui <2 x float> %mul.i to <2 x i32> 31 tail call void @foo_uint32x2_t(<2 x i32> %vcvt.i) nounwind 32 ret void 33} 34 35declare void @foo_uint32x2_t(<2 x i32>) 36 37; Test which should not fold due to non-power of 2. 38; CHECK: t2 39; CHECK: vmul 40define void @t2() nounwind { 41entry: 42 %tmp = load float* @in, align 4, !tbaa !0 43 %vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0 44 %vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1 45 %mul.i = fmul <2 x float> %vecinit2.i, <float 0x401B333340000000, float 0x401B333340000000> 46 %vcvt.i = fptosi <2 x float> %mul.i to <2 x i32> 47 tail call void @foo_int32x2_t(<2 x i32> %vcvt.i) nounwind 48 ret void 49} 50 51; Test which should not fold due to power of 2 out of range. 52; CHECK: t3 53; CHECK: vmul 54define void @t3() nounwind { 55entry: 56 %tmp = load float* @in, align 4, !tbaa !0 57 %vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0 58 %vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1 59 %mul.i = fmul <2 x float> %vecinit2.i, <float 0x4200000000000000, float 0x4200000000000000> 60 %vcvt.i = fptosi <2 x float> %mul.i to <2 x i32> 61 tail call void @foo_int32x2_t(<2 x i32> %vcvt.i) nounwind 62 ret void 63} 64 65; Test which case where const is max power of 2 (i.e., 2^32). 66; CHECK: t4 67; CHECK-NOT: vmul 68define void @t4() nounwind { 69entry: 70 %tmp = load float* @in, align 4, !tbaa !0 71 %vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0 72 %vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1 73 %mul.i = fmul <2 x float> %vecinit2.i, <float 0x41F0000000000000, float 0x41F0000000000000> 74 %vcvt.i = fptosi <2 x float> %mul.i to <2 x i32> 75 tail call void @foo_int32x2_t(<2 x i32> %vcvt.i) nounwind 76 ret void 77} 78 79; Test quadword. 80; CHECK: t5 81; CHECK-NOT: vmul 82define void @t5() nounwind { 83entry: 84 %tmp = load float* @in, align 4, !tbaa !0 85 %vecinit.i = insertelement <4 x float> undef, float %tmp, i32 0 86 %vecinit2.i = insertelement <4 x float> %vecinit.i, float %tmp, i32 1 87 %vecinit4.i = insertelement <4 x float> %vecinit2.i, float %tmp, i32 2 88 %vecinit6.i = insertelement <4 x float> %vecinit4.i, float %tmp, i32 3 89 %mul.i = fmul <4 x float> %vecinit6.i, <float 8.000000e+00, float 8.000000e+00, float 8.000000e+00, float 8.000000e+00> 90 %vcvt.i = fptosi <4 x float> %mul.i to <4 x i32> 91 tail call void @foo_int32x4_t(<4 x i32> %vcvt.i) nounwind 92 ret void 93} 94 95declare void @foo_int32x4_t(<4 x i32>) 96 97!0 = metadata !{metadata !"float", metadata !1} 98!1 = metadata !{metadata !"omnipotent char", metadata !2} 99!2 = metadata !{metadata !"Simple C/C++ TBAA", null} 100