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1; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=PIC
2; RUN: llc -march=mipsel -relocation-model=static < %s \
3; RUN:                             | FileCheck %s -check-prefix=STATIC
4; RUN: llc -march=mipsel -relocation-model=static < %s \
5; RUN:   -mips-fix-global-base-reg=false | FileCheck %s -check-prefix=STATICGP
6
7@t1 = thread_local global i32 0, align 4
8
9define i32 @f1() nounwind {
10entry:
11  %tmp = load i32* @t1, align 4
12  ret i32 %tmp
13
14; CHECK: f1:
15
16; PIC:   lw      $25, %call16(__tls_get_addr)($gp)
17; PIC:   addiu   $4, $gp, %tlsgd(t1)
18; PIC:   jalr    $25
19; PIC:   lw      $2, 0($2)
20
21; STATIC:   rdhwr   $3, $29
22; STATIC:   lui     $[[R0:[0-9]+]], %tprel_hi(t1)
23; STATIC:   addiu   $[[R1:[0-9]+]], $[[R0]], %tprel_lo(t1)
24; STATIC:   addu    $[[R2:[0-9]+]], $3, $[[R1]]
25; STATIC:   lw      $2, 0($[[R2]])
26}
27
28
29@t2 = external thread_local global i32
30
31define i32 @f2() nounwind {
32entry:
33  %tmp = load i32* @t2, align 4
34  ret i32 %tmp
35
36; CHECK: f2:
37
38; PIC:   lw      $25, %call16(__tls_get_addr)($gp)
39; PIC:   addiu   $4, $gp, %tlsgd(t2)
40; PIC:   jalr    $25
41; PIC:   lw      $2, 0($2)
42
43; STATICGP: lui     $[[R0:[0-9]+]], %hi(__gnu_local_gp)
44; STATICGP: addiu   $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
45; STATICGP: lw      ${{[0-9]+}}, %gottprel(t2)($[[GP]])
46; STATIC:   lui     $gp, %hi(__gnu_local_gp)
47; STATIC:   addiu   $gp, $gp, %lo(__gnu_local_gp)
48; STATIC:   rdhwr   $3, $29
49; STATIC:   lw      $[[R0:[0-9]+]], %gottprel(t2)($gp)
50; STATIC:   addu    $[[R1:[0-9]+]], $3, $[[R0]]
51; STATIC:   lw      $2, 0($[[R1]])
52}
53
54@f3.i = internal thread_local unnamed_addr global i32 1, align 4
55
56define i32 @f3() nounwind {
57entry:
58; CHECK: f3:
59
60; PIC:   addiu   $4, $gp, %tlsldm(f3.i)
61; PIC:   jalr    $25
62; PIC:   lui     $[[R0:[0-9]+]], %dtprel_hi(f3.i)
63; PIC:   addu    $[[R1:[0-9]+]], $[[R0]], $2
64; PIC:   lw      ${{[0-9]+}}, %dtprel_lo(f3.i)($[[R1]])
65
66  %0 = load i32* @f3.i, align 4
67  %inc = add nsw i32 %0, 1
68  store i32 %inc, i32* @f3.i, align 4
69  ret i32 %inc
70}
71
72