1; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s 2 3; CHECK: vshufps $-53, %ymm 4define <8 x float> @A(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp { 5entry: 6 %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 3, i32 2, i32 8, i32 11, i32 7, i32 6, i32 12, i32 15> 7 ret <8 x float> %shuffle 8} 9 10; CHECK: vshufps $-53, (%{{.*}}), %ymm 11define <8 x float> @A2(<8 x float>* %a, <8 x float>* %b) nounwind uwtable readnone ssp { 12entry: 13 %a2 = load <8 x float>* %a 14 %b2 = load <8 x float>* %b 15 %shuffle = shufflevector <8 x float> %a2, <8 x float> %b2, <8 x i32> <i32 3, i32 2, i32 8, i32 11, i32 7, i32 6, i32 12, i32 15> 16 ret <8 x float> %shuffle 17} 18 19; CHECK: vshufps $-53, %ymm 20define <8 x i32> @A3(<8 x i32> %a, <8 x i32> %b) nounwind uwtable readnone ssp { 21entry: 22 %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 3, i32 2, i32 8, i32 11, i32 7, i32 6, i32 12, i32 15> 23 ret <8 x i32> %shuffle 24} 25 26; CHECK: vshufps $-53, (%{{.*}}), %ymm 27define <8 x i32> @A4(<8 x i32>* %a, <8 x i32>* %b) nounwind uwtable readnone ssp { 28entry: 29 %a2 = load <8 x i32>* %a 30 %b2 = load <8 x i32>* %b 31 %shuffle = shufflevector <8 x i32> %a2, <8 x i32> %b2, <8 x i32> <i32 3, i32 2, i32 8, i32 11, i32 7, i32 6, i32 12, i32 15> 32 ret <8 x i32> %shuffle 33} 34 35; CHECK: vshufpd $10, %ymm 36define <4 x double> @B(<4 x double> %a, <4 x double> %b) nounwind uwtable readnone ssp { 37entry: 38 %shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 7> 39 ret <4 x double> %shuffle 40} 41 42; CHECK: vshufpd $10, (%{{.*}}), %ymm 43define <4 x double> @B2(<4 x double>* %a, <4 x double>* %b) nounwind uwtable readnone ssp { 44entry: 45 %a2 = load <4 x double>* %a 46 %b2 = load <4 x double>* %b 47 %shuffle = shufflevector <4 x double> %a2, <4 x double> %b2, <4 x i32> <i32 0, i32 5, i32 2, i32 7> 48 ret <4 x double> %shuffle 49} 50 51; CHECK: vshufpd $10, %ymm 52define <4 x i64> @B3(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { 53entry: 54 %shuffle = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 7> 55 ret <4 x i64> %shuffle 56} 57 58; CHECK: vshufpd $10, (%{{.*}}), %ymm 59define <4 x i64> @B4(<4 x i64>* %a, <4 x i64>* %b) nounwind uwtable readnone ssp { 60entry: 61 %a2 = load <4 x i64>* %a 62 %b2 = load <4 x i64>* %b 63 %shuffle = shufflevector <4 x i64> %a2, <4 x i64> %b2, <4 x i32> <i32 0, i32 5, i32 2, i32 7> 64 ret <4 x i64> %shuffle 65} 66 67; CHECK: vshufps $-53, %ymm 68define <8 x float> @C(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp { 69entry: 70 %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 3, i32 undef, i32 undef, i32 11, i32 undef, i32 6, i32 12, i32 undef> 71 ret <8 x float> %shuffle 72} 73 74; CHECK: vshufpd $2, %ymm 75define <4 x double> @D(<4 x double> %a, <4 x double> %b) nounwind uwtable readnone ssp { 76entry: 77 %shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 undef> 78 ret <4 x double> %shuffle 79} 80 81; CHECK: vshufps $-55, %ymm 82define <8 x float> @E(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp { 83entry: 84 %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 9, i32 10, i32 0, i32 3, i32 13, i32 14, i32 4, i32 7> 85 ret <8 x float> %shuffle 86} 87 88; CHECK: vshufpd $8, %ymm 89define <4 x double> @F(<4 x double> %a, <4 x double> %b) nounwind uwtable readnone ssp { 90entry: 91 %shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 7> 92 ret <4 x double> %shuffle 93} 94 95; CHECK: vshufps $-53, %xmm 96define <4 x float> @A128(<4 x float> %a, <4 x float> %b) nounwind uwtable readnone ssp { 97entry: 98 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 4, i32 7> 99 ret <4 x float> %shuffle 100} 101 102; CHECK: vshufps $-53, (%{{.*}}), %xmm 103define <4 x float> @A2128(<4 x float>* %a, <4 x float>* %b) nounwind uwtable readnone ssp { 104entry: 105 %a2 = load <4 x float>* %a 106 %b2 = load <4 x float>* %b 107 %shuffle = shufflevector <4 x float> %a2, <4 x float> %b2, <4 x i32> <i32 3, i32 2, i32 4, i32 7> 108 ret <4 x float> %shuffle 109} 110 111; CHECK: vshufps $-53, %xmm 112define <4 x i32> @A3128(<4 x i32> %a, <4 x i32> %b) nounwind uwtable readnone ssp { 113entry: 114 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 2, i32 4, i32 7> 115 ret <4 x i32> %shuffle 116} 117 118; CHECK: vshufps $-53, (%{{.*}}), %xmm 119define <4 x i32> @A4128(<4 x i32>* %a, <4 x i32>* %b) nounwind uwtable readnone ssp { 120entry: 121 %a2 = load <4 x i32>* %a 122 %b2 = load <4 x i32>* %b 123 %shuffle = shufflevector <4 x i32> %a2, <4 x i32> %b2, <4 x i32> <i32 3, i32 2, i32 4, i32 7> 124 ret <4 x i32> %shuffle 125} 126 127; CHECK: vshufpd $1, %xmm 128define <2 x double> @B128(<2 x double> %a, <2 x double> %b) nounwind uwtable readnone ssp { 129entry: 130 %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 2> 131 ret <2 x double> %shuffle 132} 133 134; CHECK: vshufpd $1, (%{{.*}}), %xmm 135define <2 x double> @B2128(<2 x double>* %a, <2 x double>* %b) nounwind uwtable readnone ssp { 136entry: 137 %a2 = load <2 x double>* %a 138 %b2 = load <2 x double>* %b 139 %shuffle = shufflevector <2 x double> %a2, <2 x double> %b2, <2 x i32> <i32 1, i32 2> 140 ret <2 x double> %shuffle 141} 142 143; CHECK: vshufpd $1, %xmm 144define <2 x i64> @B3128(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp { 145entry: 146 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 2> 147 ret <2 x i64> %shuffle 148} 149 150; CHECK: vshufpd $1, (%{{.*}}), %xmm 151define <2 x i64> @B4128(<2 x i64>* %a, <2 x i64>* %b) nounwind uwtable readnone ssp { 152entry: 153 %a2 = load <2 x i64>* %a 154 %b2 = load <2 x i64>* %b 155 %shuffle = shufflevector <2 x i64> %a2, <2 x i64> %b2, <2 x i32> <i32 1, i32 2> 156 ret <2 x i64> %shuffle 157} 158