| /external/clang/lib/StaticAnalyzer/Core/ |
| D | SimpleConstraintManager.h | 28 SimpleConstraintManager(SubEngine &subengine, BasicValueFactory &BV) in SimpleConstraintManager()
|
| D | RangeConstraintManager.cpp | 108 void IntersectInRange(BasicValueFactory &BV, Factory &F, in IntersectInRange()
241 RangeSet Intersect(BasicValueFactory &BV, Factory &F, in Intersect()
375 BasicValueFactory &BV = getBasicVals(); in GetRange() local
|
| D | MemRegion.cpp | 1222 VarVec *BV = (VarVec*) A.Allocate<VarVec>(); in LazyInitializeReferencedVars() local
|
| /external/llvm/include/llvm/ADT/ |
| D | SmallBitVector.h | 99 void switchToLarge(BitVector *BV) { in switchToLarge()
274 BitVector *BV = new BitVector(SmallSize); in reserve() local
|
| /external/llvm/unittests/Support/ |
| D | ValueHandleTest.cpp | 68 Value *BV = BitcastV.get(); in TEST_F() local
146 Value *BV = BitcastV.get(); in TEST_F() local
223 Value *BV = BitcastV.get(); in TEST_F() local
|
| /external/llvm/lib/CodeGen/ |
| D | AggressiveAntiDepBreaker.cpp | 511 BitVector BV(TRI->getNumRegs(), false); in GetRenameRegisters() local
576 BitVector BV = GetRenameRegisters(Reg); in FindSuitableFreeRegisters() local
662 BitVector BV = RenameRegisterMap[Reg]; in FindSuitableFreeRegisters() local
|
| D | RegisterScavenging.cpp | 112 void RegScavenger::addRegWithSubRegs(BitVector &BV, unsigned Reg) { in addRegWithSubRegs()
|
| D | MachineFunction.cpp | 477 BitVector BV(TRI->getNumRegs()); in getPristineRegs() local
|
| /external/clang/test/Sema/ |
| D | ms_class_layout.cpp | 132 struct BV : AV { struct
|
| /external/clang/lib/Analysis/ |
| D | AnalysisDeclContext.cpp | 415 DeclVec *BV = (DeclVec*) A.Allocate<DeclVec>(); in LazyInitializeReferencedDecls() local
|
| /external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| D | SymbolManager.h | 482 BasicValueFactory &BV; variable
|
| /external/llvm/utils/TableGen/ |
| D | CodeGenRegisters.cpp | 1831 BitVector BV(Registers.size() + 1); in computeCoveredRegisters() local
|
| /external/llvm/lib/Transforms/Vectorize/ |
| D | BBVectorize.cpp | 1957 Instruction *BV = new ShuffleVectorInst(LOp, HOp, in getReplacementInput() local
|
| /external/llvm/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 1759 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, in LowerV2I64Splat() local
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 5521 ConstantFoldBITCASTofBUILD_VECTOR(SDNode *BV, EVT DstEltVT) { in ConstantFoldBITCASTofBUILD_VECTOR()
8013 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), in visitBUILD_VECTOR() local
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 709 BuildVectorSDNode *BV = cast<BuildVectorSDNode>(N); in isAllNegativeZeroVector() local
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 8088 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, FloatVT, Ops.data(), NumElts); in PerformBUILD_VECTORCombine() local
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 13578 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v32i8, in PerformTruncateCombine() local
|