| /external/llvm/lib/Target/Mips/ |
| D | MipsAnalyzeImmediate.cpp | 29 void MipsAnalyzeImmediate::GetInstSeqLsADDiu(uint64_t Imm, unsigned RemSize, in GetInstSeqLsADDiu()
35 void MipsAnalyzeImmediate::GetInstSeqLsORi(uint64_t Imm, unsigned RemSize, in GetInstSeqLsORi()
41 void MipsAnalyzeImmediate::GetInstSeqLsSLL(uint64_t Imm, unsigned RemSize, in GetInstSeqLsSLL()
48 void MipsAnalyzeImmediate::GetInstSeqLs(uint64_t Imm, unsigned RemSize, in GetInstSeqLs()
93 int64_t Imm = SignExtend64<16>(Seq[0].ImmOpnd); in ReplaceADDiuSLLWithLUi() local
125 &MipsAnalyzeImmediate::Analyze(uint64_t Imm, unsigned Size, in Analyze()
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| D | MipsISelDAGToDAG.cpp | 98 inline SDValue getImm(const SDNode *Node, unsigned Imm) { in getImm()
510 int64_t Imm = CN->getSExtValue(); in Select() local
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| D | MipsSEInstrInfo.cpp | 272 MipsSEInstrInfo::loadImmediate(int64_t Imm, MachineBasicBlock &MBB, in loadImmediate()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 112 static inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) { in getSORegOpc()
124 static inline unsigned getSOImmValImm(unsigned Imm) { in getSOImmValImm()
129 static inline unsigned getSOImmValRot(unsigned Imm) { in getSOImmValRot()
137 static inline unsigned getSOImmValRotate(unsigned Imm) { in getSOImmValRotate()
218 static inline unsigned getThumbImmValShift(unsigned Imm) { in getThumbImmValShift()
237 static inline unsigned getThumbImm16ValShift(unsigned Imm) { in getThumbImm16ValShift()
271 unsigned u, Vs, Imm; in getT2SOImmValSplatVal() local
335 static inline bool isT2SOImmTwoPartVal (unsigned Imm) { in isT2SOImmTwoPartVal()
362 static inline unsigned getT2SOImmTwoPartFirst(unsigned Imm) { in getT2SOImmTwoPartFirst()
379 static inline unsigned getT2SOImmTwoPartSecond(unsigned Imm) { in getT2SOImmTwoPartSecond()
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| D | ARMMCCodeEmitter.cpp | 435 unsigned &Imm, SmallVectorImpl<MCFixup> &Fixups) const { in EncodeAddrModeOpValues()
975 unsigned Imm = MO1.getImm(); in getAddrMode2OffsetOpValue() local
1009 unsigned Imm = MO1.getImm(); in getAddrMode3OffsetOpValue() local
1044 unsigned Imm = MO2.getImm(); in getAddrMode3OpValue() local
1391 const MCOperand &Imm = MI.getOperand(Op + 1); in getAddrMode6AddressOpValue() local
1414 const MCOperand &Imm = MI.getOperand(Op + 1); in getAddrMode6OneLane32AddressOpValue() local
1440 const MCOperand &Imm = MI.getOperand(Op + 1); in getAddrMode6DupAddressOpValue() local
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| D | ARMMCTargetDesc.cpp | 221 int64_t Imm = Inst.getOperand(0).getImm(); in evaluateBranch() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 62 inline SDValue getI32Imm(unsigned Imm) { in getI32Imm()
68 inline SDValue getI64Imm(uint64_t Imm) { in getI64Imm()
73 inline SDValue getSmallIPtrImm(unsigned Imm) { in getSmallIPtrImm()
275 static bool isIntS16Immediate(SDNode *N, short &Imm) { in isIntS16Immediate()
286 static bool isIntS16Immediate(SDValue Op, short &Imm) { in isIntS16Immediate()
293 static bool isInt32Immediate(SDNode *N, unsigned &Imm) { in isInt32Immediate()
303 static bool isInt64Immediate(SDNode *N, uint64_t &Imm) { in isInt64Immediate()
313 static bool isInt32Immediate(SDValue N, unsigned &Imm) { in isInt32Immediate()
321 static bool isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) { in isOpcWithIntImmediate()
468 unsigned Imm; in SelectCC() local
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| /external/llvm/lib/Target/X86/Utils/ |
| D | X86ShuffleDecode.cpp | 23 void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { in DecodeINSERTPSMask()
67 void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { in DecodePSHUFMask()
83 void DecodePSHUFHWMask(MVT VT, unsigned Imm, in DecodePSHUFHWMask()
99 void DecodePSHUFLWMask(MVT VT, unsigned Imm, in DecodePSHUFLWMask()
118 void DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { in DecodeSHUFPMask()
177 void DecodeVPERM2X128Mask(MVT VT, unsigned Imm, in DecodeVPERM2X128Mask()
193 void DecodeVPERMMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { in DecodeVPERMMask()
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| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeISelDAGToDAG.cpp | 89 inline SDValue getI32Imm(unsigned Imm) { in getI32Imm()
100 static bool isIntS32Immediate(SDNode *N, int32_t &Imm) { in isIntS32Immediate()
112 static bool isIntS32Immediate(SDValue Op, int32_t &Imm) { in isIntS32Immediate()
166 uint32_t Imm = CN->getZExtValue(); in SelectAddrRegImm() local
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| /external/llvm/lib/MC/ |
| D | MCInstrAnalysis.cpp | 19 int64_t Imm = Inst.getOperand(0).getImm(); in evaluateBranch() local
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelDAGToDAG.h | 78 inline SDValue getI32Imm(unsigned Imm) { in getI32Imm()
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| /external/llvm/lib/VMCore/ |
| D | AutoUpgrade.cpp | 236 unsigned Imm; in UpgradeIntrinsicCall() local
272 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); in UpgradeIntrinsicCall() local
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| /external/llvm/utils/TableGen/ |
| D | PseudoLoweringEmitter.cpp | 27 enum MapKind { Operand, Imm, Reg }; enumerator
31 uint64_t Imm; // Integer immedate value. member
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| D | CodeGenInstruction.h | 299 int64_t Imm; member
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| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.cpp | 422 static unsigned getSUBriOpcode(unsigned is64Bit, int64_t Imm) { in getSUBriOpcode()
434 static unsigned getADDriOpcode(unsigned is64Bit, int64_t Imm) { in getADDriOpcode()
567 int Imm = (int)(MI.getOperand(i + 3).getImm()); in eliminateFrameIndex() local
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| D | X86ISelDAGToDAG.cpp | 267 inline SDValue getI8Imm(unsigned Imm) { in getI8Imm()
273 inline SDValue getI32Imm(unsigned Imm) { in getI32Imm()
335 if (ConstantSDNode *Imm = dyn_cast<ConstantSDNode>(Op1)) in IsProfitableToFold() local
2473 SDValue Imm = CurDAG->getTargetConstant(C->getZExtValue(), MVT::i8); in Select() local
2534 SDValue Imm = CurDAG->getTargetConstant(C->getZExtValue(), MVT::i16); in Select() local
2550 SDValue Imm = CurDAG->getTargetConstant(C->getZExtValue(), MVT::i32); in Select() local
2628 uint64_t Imm = Cst->getZExtValue(); in Select() local
2669 uint64_t Imm = Cst->getZExtValue(); in Select() local
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| D | X86FrameLowering.cpp | 58 static unsigned getSUBriOpcode(unsigned is64Bit, int64_t Imm) { in getSUBriOpcode()
70 static unsigned getADDriOpcode(unsigned is64Bit, int64_t Imm) { in getADDriOpcode()
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| D | X86ISelLowering.h | 717 void addLegalFPImmediate(const APFloat& Imm) { in addLegalFPImmediate()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 368 uint64_t Imm) { in FastEmitInst_ri()
413 uint64_t Imm) { in FastEmitInst_rri()
436 uint64_t Imm) { in FastEmitInst_i()
518 int Imm; in ARMMaterializeFP() local
574 unsigned Imm = (unsigned)~(CI->getSExtValue()); in ARMMaterializeInt() local
972 signed Imm = (Addr.Offset < 0) ? (0x100 | -Addr.Offset) : Addr.Offset; in AddLoadStoreOperands() local
986 signed Imm = (Addr.Offset < 0) ? (0x100 | -Addr.Offset) : Addr.Offset; in AddLoadStoreOperands() local
1334 uint64_t Imm = CI->getZExtValue(); in SelectBranch() local
1390 int Imm = 0; in ARMEmitCmp() local
1652 int Imm = 0; in SelectSelect() local
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| D | Thumb2SizeReduction.cpp | 502 unsigned Imm = MI->getOperand(2).getImm(); in ReduceSpecial() local
631 unsigned Imm = MI->getOperand(2).getImm(); in ReduceTo2Addr() local
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| /external/llvm/lib/Target/CellSPU/ |
| D | SPUISelDAGToDAG.cpp | 78 isIntS16Immediate(ConstantSDNode *CN, short &Imm) in isIntS16Immediate()
95 isFPS16Immediate(ConstantFPSDNode *FPN, short &Imm) in isFPS16Immediate()
166 inline SDValue getI32Imm(uint32_t Imm) { in getI32Imm()
171 inline SDValue getSmallIPtrImm(unsigned Imm) { in getSmallIPtrImm()
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| /external/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 501 unsigned Imm = MO.getImm(); in printPostIdxImm8Operand() local
517 unsigned Imm = MO.getImm(); in printPostIdxImm8s4Operand() local
610 unsigned Imm = MI->getOperand(OpNum).getImm(); in printPKHLSLShiftImm() local
619 unsigned Imm = MI->getOperand(OpNum).getImm(); in printPKHASRShiftImm() local
821 unsigned Imm = MI->getOperand(OpNum).getImm(); in printThumbSRImm() local
1067 unsigned Imm = MI->getOperand(OpNum).getImm(); in printImmPlusOneOperand() local
1073 unsigned Imm = MI->getOperand(OpNum).getImm(); in printRotImmOperand() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 389 uint64_t Imm = CI->getZExtValue(); in SelectBinaryOp() local
1126 uint64_t Imm, MVT ImmType) { in FastEmit_ri_()
1240 uint64_t Imm) { in FastEmitInst_ri()
1306 uint64_t Imm) { in FastEmitInst_rri()
1352 uint64_t Imm) { in FastEmitInst_i()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelDAGToDAG.cpp | 54 inline SDValue getI32Imm(unsigned Imm) { in getI32Imm()
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 363 } Imm; member
388 unsigned Imm; member
402 unsigned Imm; member
1464 unsigned Imm = (RegShiftedImm.ShiftImm == 32 ? 0 : RegShiftedImm.ShiftImm); in addRegShiftedImmOperands() local
1585 unsigned Imm = CE->getValue(); in addImmThumbSROperands() local
1650 int32_t Imm = Memory.OffsetImm->getValue(); in addMemPCRelImm12Operands() local
1921 int Imm = CE->getValue(); in addPostIdxImm8Operands() local
1932 int Imm = CE->getValue(); in addPostIdxImm8s4Operands() local
1952 unsigned Imm = ARM_AM::getAM2Opc(opc, PostIdxReg.ShiftImm, in addPostIdxRegShiftedOperands() local
2060 unsigned Imm = 0; in addNEONi64splatOperands() local
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