| /external/llvm/lib/Target/X86/ |
| D | X86MCInstLower.cpp | 223 static void LowerSubReg32_Op0(MCInst &OutMI, unsigned NewOpc) { in LowerSubReg32_Op0()
228 static void LowerUnaryToTwoAddr(MCInst &OutMI, unsigned NewOpc) { in LowerUnaryToTwoAddr()
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| D | X86InstrInfo.cpp | 3333 unsigned NewOpc; in optimizeCompareInstr() local
3807 unsigned NewOpc = 0; in foldMemoryOperandImpl() local
3868 unsigned NewOpc = 0; in foldMemoryOperandImpl() local
4107 unsigned NewOpc; in unfoldMemoryOperand() local
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| /external/llvm/lib/Target/ARM/ |
| D | Thumb2InstrInfo.cpp | 439 unsigned NewOpc = isSub ? ARM::t2SUBri12 : ARM::t2ADDri12; in rewriteT2FrameIndex() local
473 unsigned NewOpc = Opcode; in rewriteT2FrameIndex() local
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| D | ARMLoadStoreOptimizer.cpp | 776 unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode, Mode); in MergeBaseUpdateLSMultiple() local
875 unsigned NewOpc = 0; in MergeBaseUpdateLoadStore() local
1075 DebugLoc dl, unsigned NewOpc, in InsertLDR_STR()
1135 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local
1158 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local
1406 unsigned NewOpc = (isThumb2 ? ARM::t2LDMIA_RET : ARM::LDMIA_RET); in MergeReturnIntoLDM() local
1562 unsigned &NewOpc, unsigned &EvenReg, in CanFormLdStDWord()
1728 unsigned NewOpc = 0; in RescheduleOps() local
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| D | ARMExpandPseudoInsts.cpp | 944 unsigned NewOpc = ARM::VLDMDIA; in ExpandMI() local
975 unsigned NewOpc = ARM::VSTMDIA; in ExpandMI() local
1006 unsigned NewOpc = Opcode == ARM::VDUPfqf ? ARM::VDUPLN32q : in ExpandMI() local
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| D | Thumb1RegisterInfo.cpp | 505 unsigned NewOpc = convertToNonSPOpcode(Opcode); in rewriteFrameIndex() local
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| D | ARMConstantIslandPass.cpp | 1700 unsigned NewOpc = 0; in optimizeThumb2Instructions() local
1754 unsigned NewOpc = 0; in optimizeThumb2Branches() local
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| D | ARMISelLowering.cpp | 2376 unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vmulls) in LowerINTRINSIC_WO_CHAIN() local
4903 unsigned NewOpc = 0; in LowerMUL() local
6617 unsigned NewOpc = MI->getOpcode() == ARM::STRi_preidx ? in EmitInstrWithCustomInserter() local
6641 unsigned NewOpc; in EmitInstrWithCustomInserter() local
6964 unsigned NewOpc = convertAddSubFlagsOpcode(MI->getOpcode()); in AdjustInstrPostInstrSelection() local
8200 unsigned NewOpc = 0; in CombineBaseUpdate() local
8319 unsigned NewOpc = 0; in CombineVLDDUP() local
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| D | ARMISelDAGToDAG.cpp | 3008 unsigned NewOpc = ARM::LDREXD; in Select() local
3094 unsigned NewOpc = ARM::STREXD; in Select() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsLongBranch.cpp | 220 unsigned NewOpc = TII->GetOppositeBranchOpc(Br->getOpcode()); in replaceBranch() local
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| /external/llvm/lib/Target/CellSPU/ |
| D | SPUISelDAGToDAG.cpp | 608 unsigned NewOpc = 0; in Select() local
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| D | SPUISelLowering.cpp | 743 unsigned NewOpc = ISD::ANY_EXTEND; in LowerLOAD() local
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| /external/llvm/lib/CodeGen/ |
| D | MachineLICM.cpp | 1255 unsigned NewOpc = in ExtractHoistableLoad() local
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| D | TwoAddressInstructionPass.cpp | 1106 unsigned NewOpc = in TryInstructionTransform() local
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 6759 unsigned NewOpc; in processInstruction() local
7233 unsigned NewOpc; in processInstruction() local
7348 unsigned NewOpc; in processInstruction() local
7387 unsigned NewOpc; in processInstruction() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeIntegerTypes.cpp | 353 unsigned NewOpc = N->getOpcode(); in PromoteIntRes_FP_TO_XINT() local
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