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Searched refs:FE_ALL_EXCEPT (Results 1 – 19 of 19) sorted by relevance

/bionic/libm/alpha/
Dfenv.c71 r.__bits &= ~((fenv_t)FE_ALL_EXCEPT << _FPUSW_SHIFT); in feholdexcept()
73 if (p.mask & FE_ALL_EXCEPT) { in feholdexcept()
87 p.mask = *envp & FE_ALL_EXCEPT; in fesetenv()
89 r.__bits = *envp & ~FE_ALL_EXCEPT; in fesetenv()
101 p.mask = *envp & FE_ALL_EXCEPT; in feupdateenv()
104 newr.__bits = *envp & ~FE_ALL_EXCEPT; in feupdateenv()
107 feraiseexcept((oldr.__bits >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); in feupdateenv()
117 p.mask |= (mask & FE_ALL_EXCEPT); in __feenableexcept()
128 p.mask &= ~(mask & FE_ALL_EXCEPT); in __fedisableexcept()
Dfenv.h44 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | FE_INTOVF | \ macro
/bionic/libm/amd64/
Dfenv.c97 mxcsr &= ~FE_ALL_EXCEPT; in feholdexcept()
98 mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT; in feholdexcept()
111 feraiseexcept((mxcsr | status) & FE_ALL_EXCEPT); in feupdateenv()
120 mask &= FE_ALL_EXCEPT; in __feenableexcept()
123 omask = (control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT; in __feenableexcept()
136 mask &= FE_ALL_EXCEPT; in __fedisableexcept()
139 omask = (control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT; in __fedisableexcept()
Dfenv.h54 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_DENORMAL | FE_INEXACT | \ macro
94 if (__excepts == FE_ALL_EXCEPT) { in feclearexcept()
196 return (~__control & FE_ALL_EXCEPT); in fegetexcept()
/bionic/libm/mips/
Dfenv.h46 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ macro
63 #define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
158 __env &= ~(FE_ALL_EXCEPT | _ENABLE_MASK); in feholdexcept()
178 feraiseexcept(__fpsr & FE_ALL_EXCEPT); in feupdateenv()
190 __new_fpsr = __old_fpsr | (__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT; in feenableexcept()
192 return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); in feenableexcept()
201 __new_fpsr = __old_fpsr & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT); in fedisableexcept()
203 return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); in fedisableexcept()
/bionic/libm/include/arm/
Dfenv.h43 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ macro
61 #define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
156 __env &= ~(FE_ALL_EXCEPT | _ENABLE_MASK); in feholdexcept()
176 feraiseexcept(__fpsr & FE_ALL_EXCEPT); in feupdateenv()
188 __new_fpsr = __old_fpsr | (__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT; in feenableexcept()
190 return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); in feenableexcept()
199 __new_fpsr = __old_fpsr & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT); in fedisableexcept()
201 return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); in fedisableexcept()
/bionic/libm/arm/
Dfenv.h45 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ macro
62 #define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
157 __env &= ~(FE_ALL_EXCEPT | _ENABLE_MASK); in feholdexcept()
177 feraiseexcept(__fpsr & FE_ALL_EXCEPT); in feupdateenv()
189 __new_fpsr = __old_fpsr | (__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT; in feenableexcept()
191 return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); in feenableexcept()
200 __new_fpsr = __old_fpsr & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT); in fedisableexcept()
202 return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); in fedisableexcept()
/bionic/libm/include/mips/
Dfenv.h43 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ macro
61 #define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
156 __env &= ~(FE_ALL_EXCEPT | _ENABLE_MASK); in feholdexcept()
176 feraiseexcept(__fpsr & FE_ALL_EXCEPT); in feupdateenv()
188 __new_fpsr = __old_fpsr | (__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT; in feenableexcept()
190 return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); in feenableexcept()
199 __new_fpsr = __old_fpsr & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT); in fedisableexcept()
201 return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); in fedisableexcept()
/bionic/libm/i387/
Dfenv.c124 excepts &= FE_ALL_EXCEPT; in fesetexceptflag()
179 env.__status &= ~FE_ALL_EXCEPT; in feholdexcept()
180 env.__control |= FE_ALL_EXCEPT; in feholdexcept()
187 mxcsr &= ~FE_ALL_EXCEPT; in feholdexcept()
188 mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT; in feholdexcept()
207 feraiseexcept((mxcsr | status) & FE_ALL_EXCEPT); in feupdateenv()
217 mask &= FE_ALL_EXCEPT; in feenableexcept()
224 omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT; in feenableexcept()
242 mask &= FE_ALL_EXCEPT; in fedisableexcept()
249 omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT; in fedisableexcept()
[all …]
/bionic/libm/include/ia64/
Dfenv.h44 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_DENORMAL | FE_INEXACT | \ macro
189 __fpsr &= ~((fenv_t)FE_ALL_EXCEPT << _FPUSW_SHIFT); in feholdexcept()
190 __fpsr |= FE_ALL_EXCEPT; in feholdexcept()
213 __newfpsr = __oldfpsr & ~(__mask & FE_ALL_EXCEPT); in feenableexcept()
215 return (~__oldfpsr & FE_ALL_EXCEPT); in feenableexcept()
224 __newfpsr = __oldfpsr | (__mask & FE_ALL_EXCEPT); in fedisableexcept()
226 return (~__oldfpsr & FE_ALL_EXCEPT); in fedisableexcept()
235 return (~__fpsr & FE_ALL_EXCEPT); in fegetexcept()
/bionic/libm/ia64/
Dfenv.h44 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_DENORMAL | FE_INEXACT | \ macro
189 __fpsr &= ~((fenv_t)FE_ALL_EXCEPT << _FPUSW_SHIFT); in feholdexcept()
190 __fpsr |= FE_ALL_EXCEPT; in feholdexcept()
213 __newfpsr = __oldfpsr & ~(__mask & FE_ALL_EXCEPT); in feenableexcept()
215 return (~__oldfpsr & FE_ALL_EXCEPT); in feenableexcept()
224 __newfpsr = __oldfpsr | (__mask & FE_ALL_EXCEPT); in fedisableexcept()
226 return (~__oldfpsr & FE_ALL_EXCEPT); in fedisableexcept()
235 return (~__fpsr & FE_ALL_EXCEPT); in fegetexcept()
Dfenv.c47 feraiseexcept((fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); in feupdateenv()
/bionic/libm/include/sparc64/
Dfenv.h43 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ macro
68 #define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
193 __r &= ~(FE_ALL_EXCEPT | _ENABLE_MASK); in feholdexcept()
213 feraiseexcept(__r & FE_ALL_EXCEPT); in feupdateenv()
225 __new_r = __old_r | ((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT); in feenableexcept()
227 return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); in feenableexcept()
236 __new_r = __old_r & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT); in fedisableexcept()
238 return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); in fedisableexcept()
/bionic/libm/sparc64/
Dfenv.h43 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ macro
68 #define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
193 __r &= ~(FE_ALL_EXCEPT | _ENABLE_MASK); in feholdexcept()
213 feraiseexcept(__r & FE_ALL_EXCEPT); in feupdateenv()
225 __new_r = __old_r | ((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT); in feenableexcept()
227 return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); in feenableexcept()
236 __new_r = __old_r & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT); in fedisableexcept()
238 return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); in fedisableexcept()
/bionic/libm/powerpc/
Dfenv.h63 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ macro
125 __excepts |= FE_ALL_EXCEPT; in fesetexceptflag()
195 __r.__bits.__reg &= ~(FE_ALL_EXCEPT | _ENABLE_MASK); in feholdexcept()
216 __r.__bits.__reg &= FE_ALL_EXCEPT; in feupdateenv()
232 __r.__bits.__reg |= (__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT; in feenableexcept()
245 __r.__bits.__reg &= ~((__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT); in fedisableexcept()
/bionic/libm/include/powerpc/
Dfenv.h63 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ macro
125 __excepts |= FE_ALL_EXCEPT; in fesetexceptflag()
195 __r.__bits.__reg &= ~(FE_ALL_EXCEPT | _ENABLE_MASK); in feholdexcept()
216 __r.__bits.__reg &= FE_ALL_EXCEPT; in feupdateenv()
232 __r.__bits.__reg |= (__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT; in feenableexcept()
245 __r.__bits.__reg &= ~((__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT); in fedisableexcept()
/bionic/libm/include/amd64/
Dfenv.h54 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_DENORMAL | FE_INEXACT | \ macro
94 if (__excepts == FE_ALL_EXCEPT) { in feclearexcept()
196 return (~__control & FE_ALL_EXCEPT); in fegetexcept()
/bionic/libm/include/i387/
Dfenv.h59 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_DENORMAL | FE_INEXACT | \ macro
/bionic/libm/include/alpha/
Dfenv.h44 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | FE_INTOVF | \ macro