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Searched refs:AddRegFrm (Results 1 – 11 of 11) sorted by relevance

/external/llvm/lib/Target/X86/
DX86InstrFPStack.td222 : FPI<o, AddRegFrm, (outs), (ins RST:$op), asm>, D8;
224 : FPI<o, AddRegFrm, (outs), (ins RST:$op), asm>, DC;
226 : FPI<o, AddRegFrm, (outs), (ins RST:$op), asm>, DE;
339 def CMOVB_F : FPI<0xC0, AddRegFrm, (outs RST:$op), (ins),
341 def CMOVBE_F : FPI<0xD0, AddRegFrm, (outs RST:$op), (ins),
343 def CMOVE_F : FPI<0xC8, AddRegFrm, (outs RST:$op), (ins),
345 def CMOVP_F : FPI<0xD8, AddRegFrm, (outs RST:$op), (ins),
347 def CMOVNB_F : FPI<0xC0, AddRegFrm, (outs RST:$op), (ins),
349 def CMOVNBE_F: FPI<0xD0, AddRegFrm, (outs RST:$op), (ins),
351 def CMOVNE_F : FPI<0xC8, AddRegFrm, (outs RST:$op), (ins),
[all …]
DX86InstrInfo.td767 def POP16r : I<0x58, AddRegFrm, (outs GR16:$reg), (ins), "pop{w}\t$reg", [],
769 def POP32r : I<0x58, AddRegFrm, (outs GR32:$reg), (ins), "pop{l}\t$reg", [],
786 def PUSH16r : I<0x50, AddRegFrm, (outs), (ins GR16:$reg), "push{w}\t$reg",[],
788 def PUSH32r : I<0x50, AddRegFrm, (outs), (ins GR32:$reg), "push{l}\t$reg",[],
817 def POP64r : I<0x58, AddRegFrm,
825 def PUSH64r : I<0x50, AddRegFrm,
864 def BSWAP32r : I<0xC8, AddRegFrm,
869 def BSWAP64r : RI<0xC8, AddRegFrm, (outs GR64:$dst), (ins GR64:$src),
970 def MOV8ri : Ii8 <0xB0, AddRegFrm, (outs GR8 :$dst), (ins i8imm :$src),
973 def MOV16ri : Ii16<0xB8, AddRegFrm, (outs GR16:$dst), (ins i16imm:$src),
[all …]
DX86InstrArithmetic.td415 def INC16r : I<0x40, AddRegFrm, (outs GR16:$dst), (ins GR16:$src1),
419 def INC32r : I<0x40, AddRegFrm, (outs GR32:$dst), (ins GR32:$src1),
501 def DEC16r : I<0x48, AddRegFrm, (outs GR16:$dst), (ins GR16:$src1),
506 def DEC32r : I<0x48, AddRegFrm, (outs GR32:$dst), (ins GR32:$src1),
DX86RegisterInfo.td356 // GR32_NOAX - GR32 registers except EAX. Used by AddRegFrm of XCHG32 in 64-bit
DX86CodeEmitter.cpp1247 case X86II::AddRegFrm: { in emitInstruction()
DX86InstrFormats.td22 def AddRegFrm : Format<2>; def MRMDestReg : Format<3>;
DX86InstrCompiler.td228 def MOV64ri64i32 : Ii32<0xB8, AddRegFrm, (outs GR64:$dst), (ins i64i32imm:$src),
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h236 AddRegFrm = 2, enumerator
540 case X86II::AddRegFrm: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp1043 case X86II::AddRegFrm: in EncodeInstruction()
/external/llvm/test/TableGen/
DTargetInstrInfo.td49 def AddRegFrm : Format<2>; def MRMDestReg : Format<3>;
93 "mov $dst, $src", 0xB0, AddRegFrm,
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp55 AddRegFrm = 2, enumerator
606 case X86Local::AddRegFrm: in emitInstructionSpecifier()
927 if (Form == X86Local::AddRegFrm) { in emitDecodePath()
994 if (Form == X86Local::AddRegFrm) { in emitDecodePath()