/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 178 BUILD_PAIR, enumerator
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/external/llvm/lib/Target/XCore/ |
D | XCoreISelLowering.cpp | 688 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in TryExpandADDWithMul() 696 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in TryExpandADDWithMul() 711 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in TryExpandADDWithMul() 751 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in ExpandADDSUB() 1484 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in PerformDAGCombine()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeFloatTypes.cpp | 60 case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break; in SoftenFloatResult() 119 return DAG.getNode(ISD::BUILD_PAIR, N->getDebugLoc(), in SoftenFloatRes_BUILD_PAIR() 843 case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break; in ExpandFloatResult() 1204 Hi = DAG.getNode(ISD::BUILD_PAIR, dl, VT, Lo, Hi); in ExpandFloatRes_XINT_TO_FP()
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D | SelectionDAGDumper.cpp | 265 case ISD::BUILD_PAIR: return "build_pair"; in getOperationName()
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D | LegalizeIntegerTypes.cpp | 55 case ISD::BUILD_PAIR: Res = PromoteIntRes_BUILD_PAIR(N); break; in PromoteIntegerResult() 762 case ISD::BUILD_PAIR: Res = PromoteIntOp_BUILD_PAIR(N); break; in PromoteIntegerOperand() 1093 case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break; in ExpandIntegerResult()
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D | SelectionDAGBuilder.cpp | 139 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi); in getCopyFromParts() 169 Val = DAG.getNode(ISD::BUILD_PAIR, DL, ValueVT, Lo, Hi); in getCopyFromParts() 6815 if (!TM.Options.EnableFastISel && Res.getOpcode() == ISD::BUILD_PAIR) { in LowerArguments()
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D | SelectionDAG.cpp | 807 case ISD::BUILD_PAIR: { in VerifyNodeCommon() 2996 if (N1.getOpcode() == ISD::BUILD_PAIR) in getNode()
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D | DAGCombiner.cpp | 1129 case ISD::BUILD_PAIR: return visitBUILD_PAIR(N); in visit() 5333 assert(N->getOpcode() == ISD::BUILD_PAIR); in CombineConsecutiveLoads() 5503 if (N0.getOpcode() == ISD::BUILD_PAIR) { in visitBITCAST()
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D | LegalizeDAG.cpp | 3337 case ISD::BUILD_PAIR: { in ExpandNode()
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/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 206 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal); in LowerFormalArguments() 261 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal); in LowerFormalArguments()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 1289 setOperationAction(ISD::BUILD_PAIR, MVT::i64, Expand); in HexagonTargetLowering()
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/external/llvm/lib/Target/X86/ |
D | README.txt | 1489 constructed BUILD_PAIR which represents the cast value.
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D | X86ISelLowering.cpp | 8158 ? DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Ops, 2) in FP_TO_INTHelper() 11379 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, OpsF, 2)); in ReplaceATOMIC_BINARY_64() 11431 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Ops, 2)); in ReplaceNodeResults() 11478 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, dl, T, OpsF, 2)); in ReplaceNodeResults()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 301 setOperationAction(ISD::BUILD_PAIR, MVT::i64, Expand); in PPCTargetLowering() 4769 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, dl, MVT::ppcf128, in ReplaceNodeResults()
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/external/llvm/lib/Target/CellSPU/ |
D | SPUISelLowering.cpp | 398 setOperationAction(ISD::BUILD_PAIR, MVT::i64, Expand); in SPUTargetLowering()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 3383 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1)); in ExpandBITCAST() 3574 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in Expand64BitShift() 5206 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, OpsF, 2)); in ReplaceATOMIC_OP_64()
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