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Searched refs:JALR (Results 1 – 8 of 8) sorted by relevance

/external/v8/src/mips/
Dconstants-mips.cc178 case JALR: in IsForbiddenInBranchDelay()
205 case JALR: in IsLinkingInstruction()
241 case JALR: in InstructionType()
Dassembler-mips-inl.h282 (instr2 & kFunctionFieldMask) == JALR))); in IsPatchedReturnSequence()
Dassembler-mips.cc540 ((function_field == JALR) || (rd_field == 0 && (function_field == JR)))); in IsJump()
560 return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JALR; in IsJalr()
1164 GenInstrRegister(SPECIAL, rs, zero_reg, rd, 0, JALR); in jalr()
2234 *(p+2) = SPECIAL | rs_field | rd_field | JALR; in set_target_address_at()
2270 *(p+2) = SPECIAL | rs_field | rd_field | JALR; in JumpLabelToJumpRegister()
Dconstants-mips.h312 JALR = ((1 << 3) + 1), enumerator
Ddisasm-mips.cc626 case JALR: in DecodeTypeRegister()
Dsimulator-mips.cc1741 case JALR: in ConfigureTypeRegister()
2193 case JALR: { in DecodeTypeRegister()
/external/oprofile/events/mips/74K/
Devents40 event:0x16 counters:0,2 um:zero minimum:500 name:JALR_JALR_HB_INSNS : 22-0 Graduated JALR/JALR.HB …
/external/llvm/lib/Target/Mips/
DMipsInstrInfo.td1022 def JALR : JumpLinkReg<0x00, 0x09, "jalr", CPURegs>;
1132 // (JALR CPURegs:$dst)>;