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Searched refs:MRM1m (Results 1 – 14 of 14) sorted by relevance

/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h268 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, // Format /0 /1 /2 /3 enumerator
567 case X86II::MRM0m: case X86II::MRM1m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp637 case X86II::MRM0m: case X86II::MRM1m: in EmitVEXOpcodePrefix()
782 case X86II::MRM0m: case X86II::MRM1m: in DetermineREXPrefix()
1117 case X86II::MRM0m: case X86II::MRM1m: in EncodeInstruction()
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp62 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, enumerator
747 case X86Local::MRM1m: in emitInstructionSpecifier()
834 case X86Local::MRM1m: in emitDecodePath()
877 case X86Local::MRM1m: in emitDecodePath()
958 case X86Local::MRM1m: in emitDecodePath()
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td622 def ROR8mCL : I<0xD2, MRM1m, (outs), (ins i8mem :$dst),
626 def ROR16mCL : I<0xD3, MRM1m, (outs), (ins i16mem:$dst),
630 def ROR32mCL : I<0xD3, MRM1m, (outs), (ins i32mem:$dst),
634 def ROR64mCL : RI<0xD3, MRM1m, (outs), (ins i64mem:$dst),
639 def ROR8mi : Ii8<0xC0, MRM1m, (outs), (ins i8mem :$dst, i8imm:$src),
643 def ROR16mi : Ii8<0xC1, MRM1m, (outs), (ins i16mem:$dst, i8imm:$src),
648 def ROR32mi : Ii8<0xC1, MRM1m, (outs), (ins i32mem:$dst, i8imm:$src),
652 def ROR64mi : RIi8<0xC1, MRM1m, (outs), (ins i64mem:$dst, i8imm:$src),
658 def ROR8m1 : I<0xD0, MRM1m, (outs), (ins i8mem :$dst),
662 def ROR16m1 : I<0xD1, MRM1m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrFPStack.td216 defm MUL : FPBinary<fmul, MRM1m, "mul">;
485 def ISTT_FP16m : FPI<0xDF, MRM1m, (outs), (ins i16mem:$dst), "fisttp{s}\t$dst",
487 def ISTT_FP32m : FPI<0xDB, MRM1m, (outs), (ins i32mem:$dst), "fisttp{l}\t$dst",
489 def ISTT_FP64m : FPI<0xDD, MRM1m, (outs), (ins i64mem:$dst),
625 def FXRSTOR : I<0xAE, MRM1m, (outs), (ins opaque512mem:$src),
627 def FXRSTOR64 : I<0xAE, MRM1m, (outs), (ins opaque512mem:$src),
DX86Instr3DNow.td94 def PREFETCHW : I3DNow<0x0D, MRM1m, (outs), (ins i16mem:$addr),
DX86CodeEmitter.cpp216 case X86II::MRM0m: case X86II::MRM1m: in determineREX()
1006 case X86II::MRM0m: case X86II::MRM1m: in emitVEXOpcodePrefix()
1377 case X86II::MRM0m: case X86II::MRM1m: in emitInstruction()
DX86InstrArithmetic.td484 def DEC64_16m : I<0xFF, MRM1m, (outs), (ins i16mem:$dst), "dec{w}\t$dst",
488 def DEC64_32m : I<0xFF, MRM1m, (outs), (ins i32mem:$dst), "dec{l}\t$dst",
519 def DEC8m : I<0xFE, MRM1m, (outs), (ins i8mem :$dst), "dec{b}\t$dst",
522 def DEC16m : I<0xFF, MRM1m, (outs), (ins i16mem:$dst), "dec{w}\t$dst",
526 def DEC32m : I<0xFF, MRM1m, (outs), (ins i32mem:$dst), "dec{l}\t$dst",
530 def DEC64m : RI<0xFF, MRM1m, (outs), (ins i64mem:$dst), "dec{q}\t$dst",
1129 defm OR : ArithBinOp_RF<0x08, 0x0A, 0x0C, "or", MRM1r, MRM1m,
DX86InstrSystem.td229 def STRm : I<0x00, MRM1m, (outs i16mem:$dst), (ins),
358 def SIDT16m : I<0x01, MRM1m, (outs opaque48mem:$dst), (ins),
360 def SIDTm : I<0x01, MRM1m, (outs opaque48mem:$dst), (ins),
DX86InstrCompiler.td715 defm LOCK_OR : LOCK_ArithBinOp<0x08, 0x80, 0x83, MRM1m, "or">;
735 def LOCK_DEC8m : I<0xFE, MRM1m, (outs), (ins i8mem :$dst),
738 def LOCK_DEC16m : I<0xFF, MRM1m, (outs), (ins i16mem:$dst),
741 def LOCK_DEC32m : I<0xFF, MRM1m, (outs), (ins i32mem:$dst),
744 def LOCK_DEC64m : RI<0xFF, MRM1m, (outs), (ins i64mem:$dst),
752 def LCMPXCHG8B : I<0xC7, MRM1m, (outs), (ins i64mem:$ptr),
759 def LCMPXCHG16B : RI<0xC7, MRM1m, (outs), (ins i128mem:$ptr),
DX86InstrInfo.td1368 def CMPXCHG8B : I<0xC7, MRM1m, (outs), (ins i64mem:$dst),
1372 def CMPXCHG16B : RI<0xC7, MRM1m, (outs), (ins i128mem:$dst),
1588 defm BLSR32 : bmi_bls<"blsr{l}", MRM1r, MRM1m, GR32, i32mem,
1590 defm BLSR64 : bmi_bls<"blsr{q}", MRM1r, MRM1m, GR64, i64mem,
DX86InstrFormats.td28 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
DX86InstrSSE.td3388 def PREFETCHT0 : I<0x18, MRM1m, (outs), (ins i8mem:$src),
/external/llvm/test/TableGen/
DTargetInstrInfo.td55 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;