/external/llvm/lib/Target/X86/MCTargetDesc/ |
D | X86BaseInfo.h | 268 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, // Format /0 /1 /2 /3 enumerator 568 case X86II::MRM2m: case X86II::MRM3m: in getMemoryOperandNo()
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D | X86MCCodeEmitter.cpp | 638 case X86II::MRM2m: case X86II::MRM3m: in EmitVEXOpcodePrefix() 783 case X86II::MRM2m: case X86II::MRM3m: in DetermineREXPrefix() 1118 case X86II::MRM2m: case X86II::MRM3m: in EncodeInstruction()
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/external/llvm/utils/TableGen/ |
D | X86RecognizableInstr.cpp | 62 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, enumerator 748 case X86Local::MRM2m: in emitInstructionSpecifier() 835 case X86Local::MRM2m: in emitDecodePath() 878 case X86Local::MRM2m: in emitDecodePath() 959 case X86Local::MRM2m: in emitDecodePath()
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/external/llvm/lib/Target/X86/ |
D | X86InstrShiftRotate.td | 405 def RCL8m1 : I<0xD0, MRM2m, (outs), (ins i8mem:$dst), 407 def RCL8mi : Ii8<0xC0, MRM2m, (outs), (ins i8mem:$dst, i8imm:$cnt), 409 def RCL16m1 : I<0xD1, MRM2m, (outs), (ins i16mem:$dst), 411 def RCL16mi : Ii8<0xC1, MRM2m, (outs), (ins i16mem:$dst, i8imm:$cnt), 413 def RCL32m1 : I<0xD1, MRM2m, (outs), (ins i32mem:$dst), 415 def RCL32mi : Ii8<0xC1, MRM2m, (outs), (ins i32mem:$dst, i8imm:$cnt), 417 def RCL64m1 : RI<0xD1, MRM2m, (outs), (ins i64mem:$dst), 419 def RCL64mi : RIi8<0xC1, MRM2m, (outs), (ins i64mem:$dst, i8imm:$cnt), 440 def RCL8mCL : I<0xD2, MRM2m, (outs), (ins i8mem:$dst), 442 def RCL16mCL : I<0xD3, MRM2m, (outs), (ins i16mem:$dst), [all …]
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D | X86InstrFPStack.td | 281 def FCOM32m : FPI<0xD8, MRM2m, (outs), (ins f32mem:$src), "fcom{s}\t$src">; 287 def FICOM32m : FPI<0xDA, MRM2m, (outs), (ins i32mem:$src), "ficom{l}\t$src">; 290 def FCOM64m : FPI<0xDC, MRM2m, (outs), (ins f64mem:$src), "fcom{l}\t$src">; 297 def FICOM16m : FPI<0xDE, MRM2m, (outs), (ins i16mem:$src), "ficom{s}\t$src">; 440 def ST_F32m : FPI<0xD9, MRM2m, (outs), (ins f32mem:$dst), "fst{s}\t$dst", 442 def ST_F64m : FPI<0xDD, MRM2m, (outs), (ins f64mem:$dst), "fst{l}\t$dst", 450 def IST_F16m : FPI<0xDF, MRM2m, (outs), (ins i16mem:$dst), "fist{s}\t$dst", 452 def IST_F32m : FPI<0xDB, MRM2m, (outs), (ins i32mem:$dst), "fist{l}\t$dst",
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D | X86InstrControl.td | 159 def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst), 231 def CALL64m : I<0xFF, MRM2m, (outs), (ins i64mem:$dst),
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D | X86CodeEmitter.cpp | 217 case X86II::MRM2m: case X86II::MRM3m: in determineREX() 1007 case X86II::MRM2m: case X86II::MRM3m: in emitVEXOpcodePrefix() 1378 case X86II::MRM2m: case X86II::MRM3m: in emitInstruction()
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D | X86InstrSystem.td | 376 def LGDT16m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src), 378 def LGDTm : I<0x01, MRM2m, (outs), (ins opaque48mem:$src), 386 def LLDT16m : I<0x00, MRM2m, (outs), (ins i16mem:$src),
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D | X86InstrArithmetic.td | 391 def NOT8m : I<0xF6, MRM2m, (outs), (ins i8mem :$dst), 394 def NOT16m : I<0xF7, MRM2m, (outs), (ins i16mem:$dst), 398 def NOT32m : I<0xF7, MRM2m, (outs), (ins i32mem:$dst), 401 def NOT64m : RI<0xF7, MRM2m, (outs), (ins i64mem:$dst), "not{q}\t$dst", 1142 defm ADC : ArithBinOp_RFF<0x10, 0x12, 0x14, "adc", MRM2r, MRM2m, X86adc_flag,
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D | X86InstrFormats.td | 28 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
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D | X86InstrInfo.td | 1592 defm BLSMSK32 : bmi_bls<"blsmsk{l}", MRM2r, MRM2m, GR32, i32mem, 1594 defm BLSMSK64 : bmi_bls<"blsmsk{q}", MRM2r, MRM2m, GR64, i64mem,
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D | X86InstrSSE.td | 3391 def PREFETCHT1 : I<0x18, MRM2m, (outs), (ins i8mem:$src), 3430 def VLDMXCSR : VPSI<0xAE, MRM2m, (outs), (ins i32mem:$src), 3437 def LDMXCSR : PSI<0xAE, MRM2m, (outs), (ins i32mem:$src),
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/external/llvm/test/TableGen/ |
D | TargetInstrInfo.td | 55 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
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/external/llvm/docs/ |
D | TableGenFundamentals.rst | 723 def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops),
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