| /external/llvm/test/CodeGen/Mips/ |
| D | atomic.ll | 92 ; CHECK: and $[[R13:[0-9]+]], $[[R10]], $[[R7]]
93 ; CHECK: or $[[R14:[0-9]+]], $[[R13]], $[[R12]]
123 ; CHECK: and $[[R13:[0-9]+]], $[[R10]], $[[R7]]
124 ; CHECK: or $[[R14:[0-9]+]], $[[R13]], $[[R12]]
155 ; CHECK: and $[[R13:[0-9]+]], $[[R10]], $[[R7]]
156 ; CHECK: or $[[R14:[0-9]+]], $[[R13]], $[[R12]]
184 ; CHECK: and $[[R13:[0-9]+]], $[[R10]], $[[R7]]
185 ; CHECK: or $[[R14:[0-9]+]], $[[R13]], $[[R9]]
216 ; CHECK: and $[[R13:[0-9]+]], $[[R12]], $[[R6]]
217 ; CHECK: bne $[[R13]], $[[R9]], $[[BB1:[A-Z_0-9]+]]
[all …]
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| /external/llvm/lib/Target/MBlaze/MCTargetDesc/ |
| D | MBlazeBaseInfo.h | 118 case MBlaze::R13 : return 13; in getMBlazeRegisterNumbering()
182 case 13 : return MBlaze::R13; in getMBlazeRegisterFromNumbering()
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| /external/llvm/lib/Target/CellSPU/ |
| D | SPUCallingConv.td | 22 R12, R13, R14, R15, R16, R17, R18, R19, R20,
39 R12, R13, R14, R15, R16, R17, R18, R19, R20,
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| D | SPURegisterInfo.cpp | 67 case SPU::R13: return 13; in getRegisterNumbering()
|
| D | SPURegisterInfo.td | 37 def R13 : SPUVecReg<13, "$13">, DwarfRegNum<[13]>;
|
| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.cpp | 92 case X86::EDX: case X86::R13: return 3; in getCompactUnwindRegNum()
116 case X86::R13: case X86::R13D: case X86::R13W: case X86::R13B: in getSEHRegNum()
346 X86::R12, X86::R13, X86::R14, X86::R15 in getReservedRegs()
638 case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13: in getX86SubSuperRegister()
675 case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13: in getX86SubSuperRegister()
711 case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13: in getX86SubSuperRegister()
763 case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13: in getX86SubSuperRegister()
764 return X86::R13; in getX86SubSuperRegister()
|
| D | X86RegisterInfo.td | 137 def R13 : RegisterWithSubRegs<"r13", [R13D]>, DwarfRegNum<[13, -2, -2]>;
276 // R12, R13, R14, and R15 for X86-64) are callee-save registers.
279 // Allocate R12 and R13 last, as these require an extra byte when
308 RBX, R14, R15, R12, R13, RBP, RSP, RIP)>;
|
| D | X86CallingConv.td | 244 CCAssignToReg<[R13, RBP, R12, RBX, R14, RSI, RDI, R8, R9, R15]>>,
422 def CSR_64 : CalleeSavedRegs<(add RBX, R12, R13, R14, R15, RBP)>;
427 def CSR_Win64 : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12, R13, R14, R15,
|
| /external/kernel-headers/original/asm-x86/ |
| D | ptrace-abi.h | 30 #define R13 16 macro
|
| /external/valgrind/main/VEX/auxprogs/ |
| D | genoffsets.c | 113 GENOFFSET(AMD64,amd64,R13); in foo()
156 GENOFFSET(ARM,arm,R13); in foo()
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430CallingConv.td | 19 // i16 are returned in registers R15, R14, R13, R12
|
| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCBaseInfo.h | 44 case R13: case X13: case F13: case V13: case CR3GT: return 13; in getPPCRegisterNumbering()
|
| /external/valgrind/main/coregrind/m_sigframe/ |
| D | sigframe-arm-linux.c | 151 SC2(sp,R13); in synth_ucontext()
325 REST(sp,R13); in VG_()
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| D | sigframe-amd64-linux.c | 350 SC2(r13,R13); in synth_ucontext()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.td | 77 def R13 : Ri<13, "r13">, DwarfRegNum<[13]>;
109 def D6 : Rd<12, "r13:12", [R12, R13]>, DwarfRegNum<[44]>;
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 174 ENTRY(R13) \
192 ENTRY(R13) \
|
| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeRegisterInfo.cpp | 76 Reserved.set(MBlaze::R13); in getReservedRegs()
|
| D | MBlazeRegisterInfo.td | 55 def R13 : MBlazeGPRReg< 13, "r13">, DwarfRegNum<[13]>;
|
| /external/llvm/test/CodeGen/X86/ |
| D | ghc-cc64.ll | 5 @base = external global i64 ; assigned to register: R13
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 239 case X86::R13: case X86::R13D: case X86::R13W: case X86::R13B: in getX86RegNum()
313 case X86::R13: case X86::R13D: case X86::R13W: case X86::R13B: in InitLLVM2SEHRegisterMapping()
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| D | X86BaseInfo.h | 598 case X86::R12: case X86::R13: case X86::R14: case X86::R15: in isX86_64ExtendedReg()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.cpp | 140 Reserved.set(PPC::R13); // Small Data Area pointer register in getReservedRegs()
153 Reserved.set(PPC::R13); in getReservedRegs()
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| D | PPCRegisterInfo.td | 81 def R13 : GPR<13, "r13">, DwarfRegNum<[-2, 13]>;
115 def X13 : GP8<R13, "r13">, DwarfRegNum<[13, -2]>;
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| D | PPCCallingConv.td | 129 def CSR_Darwin32 : CalleeSavedRegs<(add R13, R14, R15, R16, R17, R18, R19, R20,
|
| /external/v8/src/ |
| D | platform-linux.cc | 962 enum ArmRegisters {R15 = 15, R13 = 13, R11 = 11}; enumerator
1064 sample->sp = reinterpret_cast<Address>(mcontext.gregs[R13]); in ProfilerSignalHandler()
|