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Searched refs:RDX (Results 1 – 22 of 22) sorted by relevance

/external/llvm/lib/Target/X86/
DX86InstrArithmetic.td68 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX], neverHasSideEffects = 1 in
70 "mul{q}\t$src", // RAX,RDX = RAX*GR64
71 [/*(set RAX, RDX, EFLAGS, (X86umul_flag RAX, GR64:$src))*/],
93 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
95 "mul{q}\t$src", [], IIC_MUL64>; // RAX,RDX = RAX*[mem64]
108 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
110 IIC_IMUL64_RR>; // RAX,RDX = RAX*GR64
123 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
125 "imul{q}\t$src", [], IIC_IMUL64>; // RAX,RDX = RAX*[mem64]
278 // RDX:RAX/r64 = RAX,RDX
[all …]
DX86RegisterInfo.cpp602 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegister()
614 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegister()
651 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegister()
687 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegister()
739 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegister()
740 return X86::RDX; in getX86SubSuperRegister()
DX86CallingConv.td38 CCIfType<[i64], CCAssignToReg<[RAX, RDX, RCX]>>,
151 CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
218 CCIfSRet<CCIfType<[i64], CCAssignToRegWithShadow<[RDX , R8 , R9 ],
221 CCIfType<[i64], CCAssignToRegWithShadow<[RCX , RDX , R8 , R9 ],
227 [RCX , RDX , R8 , R9 ]>>,
425 def CSR_64EHRet : CalleeSavedRegs<(add RAX, RDX, CSR_64)>;
DX86RegisterInfo.td122 def RDX : RegisterWithSubRegs<"rdx", [EDX]>, DwarfRegNum<[1, -2, -2]>;
307 (add RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11,
331 def GR64_ABCD : RegisterClass<"X86", [i64], 64, (add RAX, RCX, RDX, RBX)>;
333 def GR64_TC : RegisterClass<"X86", [i64], 64, (add RAX, RCX, RDX, RSI, RDI,
335 def GR64_TCW64 : RegisterClass<"X86", [i64], 64, (add RAX, RCX, RDX,
354 (add RAX, RCX, RDX, RSI, RDI, RBX, RBP, RSP, RIP)>;
DX86InstrSystem.td16 let Defs = [RAX, RDX] in
20 let Defs = [RAX, RCX, RDX] in
421 let Defs = [RDX, RAX], Uses = [RCX] in
424 let Uses = [RDX, RAX, RCX] in
427 let Uses = [RDX, RAX] in {
444 let Defs = [RAX, RDI], Uses = [RDX, RDI] in
449 let Defs = [RSI, RDI], Uses = [RBX, RDX, RSI, RDI] in {
461 let Defs = [RAX, RDX, RSI], Uses = [RAX, RSI] in
DX86InstrExtension.td34 let Defs = [RAX,RDX], Uses = [RAX] in
36 "{cqto|cqo}", []>; // RDX:RAX = signext(RAX)
DX86InstrCompiler.td392 let Defs = [RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11,
757 let Defs = [RAX, RDX, EFLAGS], Uses = [RAX, RBX, RCX, RDX],
DX86ISelDAGToDAG.cpp2229 case MVT::i64: LoReg = X86::RAX; HiReg = X86::RDX; break; in Select()
2343 LoReg = X86::RAX; ClrReg = HiReg = X86::RDX; in Select()
DX86FrameLowering.cpp103 X86::RAX, X86::RDX, X86::RCX, X86::RSI, X86::RDI, in findDeadCallerSavedReg()
DX86ISelLowering.cpp536 setExceptionSelectorRegister(X86::RDX); in X86TargetLowering()
1979 X86::RCX, X86::RDX, X86::R8, X86::R9 in LowerFormalArguments()
1982 X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9 in LowerFormalArguments()
2313 case X86::XMM1: ShadowReg = X86::RDX; break; in LowerCall()
11163 SDValue rdx = DAG.getCopyFromReg(rax.getValue(1), dl, X86::RDX, MVT::i64, in LowerREADCYCLECOUNTER()
11449 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
11475 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
16840 case X86::DX: DestReg = X86::RDX; break; in getRegForInlineAsmConstraint()
DX86InstrInfo.td1371 let Defs = [RAX, RDX, EFLAGS], Uses = [RAX, RBX, RCX, RDX] in
/external/kernel-headers/original/asm-x86/
Dptrace-abi.h41 #define RDX 96 macro
/external/llvm/test/MC/X86/
Dintel-syntax.s27 mov BYTE PTR [RDX + RCX], DIL
/external/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h163 ENTRY(RDX) \
181 ENTRY(RDX) \
/external/llvm/test/CodeGen/X86/
D2010-02-23-RematImplicitSubreg.ll6 ; %DL<def> = MOV8rr %reg1038<kill>, %RDX<imp-def>
/external/valgrind/main/VEX/auxprogs/
Dgenoffsets.c103 GENOFFSET(AMD64,amd64,RDX); in foo()
/external/valgrind/main/coregrind/m_sigframe/
Dsigframe-amd64-linux.c357 SC2(rdx,RDX); in synth_ucontext()
/external/valgrind/main/memcheck/
Dmc_machine.c559 if (o == GOF(RDX) && is1248) return o; in get_otrack_shadow_offset_wrk()
601 if (o == 1+ GOF(RDX) && szB == 1) return GOF(IDFLAG); in get_otrack_shadow_offset_wrk()
655 if (o == 4+ GOF(RDX) && sz == 4) return GOF(RDX); in get_otrack_shadow_offset_wrk()
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp218 case X86::RDX: case X86::EDX: case X86::DX: case X86::DL: return N86::EDX; in getX86RegNum()
/external/strace/
Dsyscall.c2227 {RDI,RSI,RDX,R10,R8,R9}, /* x86-64 ABI */ in syscall_enter()
2228 {RBX,RCX,RDX,RSI,RDI,RBP} /* i386 ABI */ in syscall_enter()
2786 val = tcp->status.PR_REG[RDX];
Dprocess.c2686 { 8*RDX, "8*RDX" },
/external/llvm/docs/
DTableGenFundamentals.rst184 RDX, RIP, RSI, RSP, SI, SIL, SP, SPL, ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7,