Searched refs:Thumb (Results 1 – 25 of 39) sorted by relevance
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| /external/llvm/test/CodeGen/Thumb/ |
| D | inlineasm-imm-thumb.ll | 3 ; Test Thumb-mode "I" constraint, for ADD immediate.
9 ; Test Thumb-mode "J" constraint, for negated ADD immediates.
15 ; Test Thumb-mode "K" constraint, for compatibility with GCC's internal use.
21 ; Test Thumb-mode "L" constraint, for 3-operand ADD immediates.
27 ; Test Thumb-mode "M" constraint, for "ADD r = sp + imm".
33 ; Test Thumb-mode "N" constraint, for values between 0 and 31.
39 ; Test Thumb-mode "O" constraint, for "ADD sp = sp + imm".
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| D | iabs.ll | 5 ;; Thumb:
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| /external/webkit/Examples/NetscapeCoreAnimationMoviePlugin/NetscapeCoreAnimationMoviePlugin.xcodeproj/ |
| D | project.pbxproj | 18 …1A80011F0FDB2CB2000F3646 /* Thumb.tiff in Resources */ = {isa = PBXBuildFile; fileRef = 1A8001190F…
35 …1A8001190FDB2CB2000F3646 /* Thumb.tiff */ = {isa = PBXFileReference; lastKnownFileType = image.tif…
87 1A8001190FDB2CB2000F3646 /* Thumb.tiff */,
166 1A80011F0FDB2CB2000F3646 /* Thumb.tiff in Resources */,
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| /external/llvm/lib/Target/ARM/ |
| D | README-Thumb.txt | 2 // Random ideas for the ARM backend (Thumb specific).
5 * Add support for compiling functions in both ARM and Thumb mode, then taking
12 * Thumb doesn't have normal pre/post increment addressing modes, but you can
32 * Thumb jumptable codegen can improve given some help from the assembler. This
216 etc. Almost all Thumb instructions clobber condition code.
224 Thumb load / store address mode offsets are scaled. The values kept in the
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| D | ARM.td | 24 "Thumb mode">;
79 "Prefer 32-bit Thumb instrs">;
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| D | ARMInstrThumb.td | 1 //===-- ARMInstrThumb.td - Thumb support for ARM -----------*- tablegen -*-===//
10 // This file describes the Thumb instruction set.
15 // Thumb specific DAG Nodes.
98 // Define Thumb specific addressing modes.
716 // There is no non-writeback version of STM for Thumb.
1178 // Conditional move tMOVCCr - Used to implement the Thumb SELECT_CC operation.
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| D | ARMInstrFormats.td | 81 // a 16-bit Thumb instruction if certain conditions are met.
270 // The instruction is a 16-bit flag setting Thumb instruction. Used
314 let DecoderNamespace = "Thumb";
361 // PseudoInst that's Thumb-mode only.
901 // Thumb Instruction Format Definitions.
914 // TI - Thumb instruction.
1018 // A6.2 16-bit Thumb instruction encoding
1143 let DecoderNamespace = "Thumb";
1289 // Tv5Pat - Same as Pat<>, but requires V5T Thumb mode.
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| D | ARMRegisterInfo.td | 225 // Thumb registers are R0-R7 normally. Some instructions can still use
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| /external/jhead/ |
| D | jpgfile.c | 589 int ReplaceThumbnailFromBuffer(const char * Thumb, int ThumbLen) in ReplaceThumbnailFromBuffer() argument
596 if (Thumb == NULL){ in ReplaceThumbnailFromBuffer()
611 if (Thumb) { in ReplaceThumbnailFromBuffer()
632 if (Thumb){ in ReplaceThumbnailFromBuffer()
633 memcpy(ThumbnailPointer, Thumb, ThumbLen); in ReplaceThumbnailFromBuffer()
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| D | jhead.h | 240 int ReplaceThumbnailFromBuffer(const char* Thumb, int ThumbLen);
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| /external/llvm/test/MC/ARM/ |
| D | mode-switch.s | 1 @ Test ARM / Thumb mode switching with .code
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| /external/valgrind/main/docs/internals/ |
| D | arm_thumb_notes_gdbserver.txt | 29 * Thumb bit in IstMark:
43 * Thumb bit in extents
74 (see Thumb bit in IstMark above).
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| /external/llvm/test/CodeGen/ARM/ |
| D | fast-isel-mvn.ll | 5 ; Note: The Thumb code is being generated by the target-independent selector.
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| /external/skia/gyp/ |
| D | opts.gyp | 53 # The assembly uses the frame pointer register (r7 in Thumb/r11 in
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| /external/openssl/crypto/modes/asm/ |
| D | ghash-armv4.s | 172 .word 0xe12fff1e @ interoperable with Thumb ISA:-)
306 .word 0xe12fff1e @ interoperable with Thumb ISA:-)
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| /external/openssl/crypto/bn/asm/ |
| D | armv4-mont.s | 142 .word 0xe12fff1e @ interoperable with Thumb ISA:-)
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| D | armv4-gf2m.s | 202 .word 0xe12fff1e @ interoperable with Thumb ISA:-)
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| /external/valgrind/main/ |
| D | glibc-X.X.supp.in | 233 # Ubuntu 10.04 on ARM (Thumb). Not sure why this is necessary.
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| D | glibc-2.X.supp.in | 233 # Ubuntu 10.04 on ARM (Thumb). Not sure why this is necessary.
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| /external/qemu/docs/ |
| D | CPU-EMULATION.TXT | 32 Thumb instructions starting at the current instruction pointer position
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| /external/openssl/crypto/aes/asm/ |
| D | aes-armv4.s | 213 .word 0xe12fff1e @ interoperable with Thumb ISA:-)
628 .word 0xe12fff1e @ interoperable with Thumb ISA:-)
716 .word 0xe12fff1e @ interoperable with Thumb ISA:-)
924 .word 0xe12fff1e @ interoperable with Thumb ISA:-)
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| /external/webkit/Examples/ |
| D | ChangeLog | 126 * NetscapeCoreAnimationMoviePlugin/Thumb.tiff: Added.
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| /external/webkit/Examples/NetscapeCoreAnimationMoviePlugin/ |
| D | MovieControllerLayer.m | 88 _thumb = createImageNamed(@"Thumb");
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| /external/llvm/ |
| D | CREDITS.TXT | 149 D: Thumb-2 code generator
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| /external/openssl/crypto/sha/asm/ |
| D | sha1-armv4-large.s | 444 .word 0xe12fff1e @ interoperable with Thumb ISA:-)
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