1This file is a partial list of people who have contributed to the LLVM 2project. If you have contributed a patch or made some other contribution to 3LLVM, please submit a patch to this file to add yourself, and it will be 4done! 5 6The list is sorted by surname and formatted to allow easy grepping and 7beautification by scripts. The fields are: name (N), email (E), web-address 8(W), PGP key ID and fingerprint (P), description (D), snail-mail address 9(S), and (I) IRC handle. 10 11 12N: Vikram Adve 13E: vadve@cs.uiuc.edu 14W: http://www.cs.uiuc.edu/~vadve/ 15D: The Sparc64 backend, provider of much wisdom, and motivator for LLVM 16 17N: Owen Anderson 18E: resistor@mac.com 19D: LCSSA pass and related LoopUnswitch work 20D: GVNPRE pass, TargetData refactoring, random improvements 21 22N: Henrik Bach 23D: MingW Win32 API portability layer 24 25N: Aaron Ballman 26E: aaron@aaronballman.com 27D: __declspec attributes, Windows support, general bug fixing 28 29N: Nate Begeman 30E: natebegeman@mac.com 31D: PowerPC backend developer 32D: Target-independent code generator and analysis improvements 33 34N: Daniel Berlin 35E: dberlin@dberlin.org 36D: ET-Forest implementation. 37D: Sparse bitmap 38 39N: David Blaikie 40E: dblaikie@gmail.com 41D: General bug fixing/fit & finish, mostly in Clang 42 43N: Neil Booth 44E: neil@daikokuya.co.uk 45D: APFloat implementation. 46 47N: Misha Brukman 48E: brukman+llvm@uiuc.edu 49W: http://misha.brukman.net 50D: Portions of X86 and Sparc JIT compilers, PowerPC backend 51D: Incremental bitcode loader 52 53N: Cameron Buschardt 54E: buschard@uiuc.edu 55D: The `mem2reg' pass - promotes values stored in memory to registers 56 57N: Brendon Cahoon 58E: bcahoon@codeaurora.org 59D: Loop unrolling with run-time trip counts. 60 61N: Chandler Carruth 62E: chandlerc@gmail.com 63D: Hashing algorithms and interfaces 64D: Inline cost analysis 65D: Machine block placement pass 66 67N: Casey Carter 68E: ccarter@uiuc.edu 69D: Fixes to the Reassociation pass, various improvement patches 70 71N: Evan Cheng 72E: evan.cheng@apple.com 73D: ARM and X86 backends 74D: Instruction scheduler improvements 75D: Register allocator improvements 76D: Loop optimizer improvements 77D: Target-independent code generator improvements 78 79N: Dan Villiom Podlaski Christiansen 80E: danchr@gmail.com 81E: danchr@cs.au.dk 82W: http://villiom.dk 83D: LLVM Makefile improvements 84D: Clang diagnostic & driver tweaks 85S: Aarhus, Denmark 86 87N: Jeff Cohen 88E: jeffc@jolt-lang.org 89W: http://jolt-lang.org 90D: Native Win32 API portability layer 91 92N: John T. Criswell 93E: criswell@uiuc.edu 94D: Original Autoconf support, documentation improvements, bug fixes 95 96N: Anshuman Dasgupta 97E: adasgupt@codeaurora.org 98D: Deterministic finite automaton based infrastructure for VLIW packetization 99 100N: Stefanus Du Toit 101E: stefanus.dutoit@rapidmind.com 102D: Bug fixes and minor improvements 103 104N: Rafael Avila de Espindola 105E: rafael.espindola@gmail.com 106D: The ARM backend 107 108N: Alkis Evlogimenos 109E: alkis@evlogimenos.com 110D: Linear scan register allocator, many codegen improvements, Java frontend 111 112N: Hal Finkel 113E: hfinkel@anl.gov 114D: Basic-block autovectorization, PowerPC backend improvements 115 116N: Ryan Flynn 117E: pizza@parseerror.com 118D: Miscellaneous bug fixes 119 120N: Brian Gaeke 121E: gaeke@uiuc.edu 122W: http://www.students.uiuc.edu/~gaeke/ 123D: Portions of X86 static and JIT compilers; initial SparcV8 backend 124D: Dynamic trace optimizer 125D: FreeBSD/X86 compatibility fixes, the llvm-nm tool 126 127N: Nicolas Geoffray 128E: nicolas.geoffray@lip6.fr 129W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/ 130D: PPC backend fixes for Linux 131 132N: Louis Gerbarg 133D: Portions of the PowerPC backend 134 135N: Saem Ghani 136E: saemghani@gmail.com 137D: Callgraph class cleanups 138 139N: Mikhail Glushenkov 140E: foldr@codedgers.com 141D: Author of llvmc2 142 143N: Dan Gohman 144E: gohman@apple.com 145D: Miscellaneous bug fixes 146 147N: David Goodwin 148E: david@goodwinz.net 149D: Thumb-2 code generator 150 151N: David Greene 152E: greened@obbligato.org 153D: Miscellaneous bug fixes 154D: Register allocation refactoring 155 156N: Gabor Greif 157E: ggreif@gmail.com 158D: Improvements for space efficiency 159 160N: James Grosbach 161E: grosbach@apple.com 162D: SjLj exception handling support 163D: General fixes and improvements for the ARM back-end 164D: MCJIT 165D: ARM integrated assembler and assembly parser 166 167N: Lang Hames 168E: lhames@gmail.com 169D: PBQP-based register allocator 170 171N: Gordon Henriksen 172E: gordonhenriksen@mac.com 173D: Pluggable GC support 174D: C interface 175D: Ocaml bindings 176 177N: Raul Fernandes Herbster 178E: raul@dsc.ufcg.edu.br 179D: JIT support for ARM 180 181N: Paolo Invernizzi 182E: arathorn@fastwebnet.it 183D: Visual C++ compatibility fixes 184 185N: Patrick Jenkins 186E: patjenk@wam.umd.edu 187D: Nightly Tester 188 189N: Dale Johannesen 190E: dalej@apple.com 191D: ARM constant islands improvements 192D: Tail merging improvements 193D: Rewrite X87 back end 194D: Use APFloat for floating point constants widely throughout compiler 195D: Implement X87 long double 196 197N: Brad Jones 198E: kungfoomaster@nondot.org 199D: Support for packed types 200 201N: Rod Kay 202E: rkay@auroraux.org 203D: Author of LLVM Ada bindings 204 205N: Eric Kidd 206W: http://randomhacks.net/ 207D: llvm-config script 208 209N: Anton Korobeynikov 210E: asl@math.spbu.ru 211D: Mingw32 fixes, cross-compiling support, stdcall/fastcall calling conv. 212D: x86/linux PIC codegen, aliases, regparm/visibility attributes 213D: Switch lowering refactoring 214 215N: Sumant Kowshik 216E: kowshik@uiuc.edu 217D: Author of the original C backend 218 219N: Benjamin Kramer 220E: benny.kra@gmail.com 221D: Miscellaneous bug fixes 222 223N: Sundeep Kushwaha 224E: sundeepk@codeaurora.org 225D: Implemented DFA-based target independent VLIW packetizer 226 227N: Christopher Lamb 228E: christopher.lamb@gmail.com 229D: aligned load/store support, parts of noalias and restrict support 230D: vreg subreg infrastructure, X86 codegen improvements based on subregs 231D: address spaces 232 233N: Jim Laskey 234E: jlaskey@apple.com 235D: Improvements to the PPC backend, instruction scheduling 236D: Debug and Dwarf implementation 237D: Auto upgrade mangler 238D: llvm-gcc4 svn wrangler 239 240N: Chris Lattner 241E: sabre@nondot.org 242W: http://nondot.org/~sabre/ 243D: Primary architect of LLVM 244 245N: Tanya Lattner (Tanya Brethour) 246E: tonic@nondot.org 247W: http://nondot.org/~tonic/ 248D: The initial llvm-ar tool, converted regression testsuite to dejagnu 249D: Modulo scheduling in the SparcV9 backend 250D: Release manager (1.7+) 251 252N: Andrew Lenharth 253E: alenhar2@cs.uiuc.edu 254W: http://www.lenharth.org/~andrewl/ 255D: Alpha backend 256D: Sampling based profiling 257 258N: Nick Lewycky 259E: nicholas@mxc.ca 260D: PredicateSimplifier pass 261 262N: Tony Linthicum, et. al. 263E: tlinth@codeaurora.org 264D: Backend for Qualcomm's Hexagon VLIW processor. 265 266N: Bruno Cardoso Lopes 267E: bruno.cardoso@gmail.com 268W: http://www.brunocardoso.org 269D: The Mips backend 270 271N: Duraid Madina 272E: duraid@octopus.com.au 273W: http://kinoko.c.u-tokyo.ac.jp/~duraid/ 274D: IA64 backend, BigBlock register allocator 275 276N: John McCall 277E: rjmccall@apple.com 278D: Clang semantic analysis and IR generation 279 280N: Michael McCracken 281E: michael.mccracken@gmail.com 282D: Line number support for llvmgcc 283 284N: Vladimir Merzliakov 285E: wanderer@rsu.ru 286D: Test suite fixes for FreeBSD 287 288N: Scott Michel 289E: scottm@aero.org 290D: Added STI Cell SPU backend. 291 292N: Kai Nacke 293E: kai@redstar.de 294D: Support for implicit TLS model used with MS VC runtime 295 296N: Takumi Nakamura 297E: geek4civic@gmail.com 298E: chapuni@hf.rim.or.jp 299D: Cygwin and MinGW support. 300D: Win32 tweaks. 301S: Yokohama, Japan 302 303N: Edward O'Callaghan 304E: eocallaghan@auroraux.org 305W: http://www.auroraux.org 306D: Add Clang support with various other improvements to utils/NewNightlyTest.pl 307D: Fix and maintain Solaris & AuroraUX support for llvm, various build warnings 308D: and error clean ups. 309 310N: Morten Ofstad 311E: morten@hue.no 312D: Visual C++ compatibility fixes 313 314N: Jakob Stoklund Olesen 315E: stoklund@2pi.dk 316D: Machine code verifier 317D: Blackfin backend 318D: Fast register allocator 319D: Greedy register allocator 320 321N: Richard Osborne 322E: richard@xmos.com 323D: XCore backend 324 325N: Devang Patel 326E: dpatel@apple.com 327D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate 328D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements 329D: Optimizer improvements, Loop Index Split 330 331N: Wesley Peck 332E: peckw@wesleypeck.com 333W: http://wesleypeck.com/ 334D: MicroBlaze backend 335 336N: Francois Pichet 337E: pichet2000@gmail.com 338D: MSVC support 339 340N: Vladimir Prus 341W: http://vladimir_prus.blogspot.com 342E: ghost@cs.msu.su 343D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass 344 345N: Kalle Raiskila 346E: kalle.rasikila@nokia.com 347D: Some bugfixes to CellSPU 348 349N: Xerxes Ranby 350E: xerxes@zafena.se 351D: Cmake dependency chain and various bug fixes 352 353N: Alex Rosenberg 354E: alexr@leftfield.org 355I: arosenberg 356D: ARM calling conventions rewrite, hard float support 357 358N: Chad Rosier 359E: mcrosier@apple.com 360D: ARM fast-isel improvements 361D: Performance monitoring 362 363N: Nadav Rotem 364E: nadav.rotem@intel.com 365D: Vector code generation improvements. 366 367N: Roman Samoilov 368E: roman@codedgers.com 369D: MSIL backend 370 371N: Duncan Sands 372E: baldrick@free.fr 373D: Ada support in llvm-gcc 374D: Dragonegg plugin 375D: Exception handling improvements 376D: Type legalizer rewrite 377 378N: Ruchira Sasanka 379E: sasanka@uiuc.edu 380D: Graph coloring register allocator for the Sparc64 backend 381 382N: Arnold Schwaighofer 383E: arnold.schwaighofer@gmail.com 384D: Tail call optimization for the x86 backend 385 386N: Shantonu Sen 387E: ssen@apple.com 388D: Miscellaneous bug fixes 389 390N: Anand Shukla 391E: ashukla@cs.uiuc.edu 392D: The `paths' pass 393 394N: Michael J. Spencer 395E: bigcheesegs@gmail.com 396D: Shepherding Windows COFF support into MC. 397D: Lots of Windows stuff. 398 399N: Reid Spencer 400E: rspencer@reidspencer.com 401W: http://reidspencer.com/ 402D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid 403 404N: Edwin Torok 405E: edwintorok@gmail.com 406D: Miscellaneous bug fixes 407 408N: Adam Treat 409E: manyoso@yahoo.com 410D: C++ bugs filed, and C++ front-end bug fixes. 411 412N: Lauro Ramos Venancio 413E: lauro.venancio@indt.org.br 414D: ARM backend improvements 415D: Thread Local Storage implementation 416 417N: Bill Wendling 418E: wendling@apple.com 419D: Exception handling 420D: Bunches of stuff 421 422N: Bob Wilson 423E: bob.wilson@acm.org 424D: Advanced SIMD (NEON) support in the ARM backend 425