| /external/mesa3d/src/glsl/glcpp/tests/ |
| D | 076-elif-undef-nested.c | 1 #ifdef UNDEF
2 #if UNDEF == 4
3 #elif UNDEF == 5
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| D | 075-elif-elif-undef.c | 1 #ifndef UNDEF
2 #elif UNDEF < 0
3 #elif UNDEF == 3
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| D | 073-if-in-ifdef.c | 1 #ifdef UNDEF
2 #if UNDEF > 1
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| D | 074-elif-undef.c | 1 #ifndef UNDEF
2 #elif UNDEF < 0
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 123 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) in isBuildVectorAllOnes()
155 N->getOperand(i).getOpcode() != ISD::UNDEF) in isBuildVectorAllOnes()
173 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) in isBuildVectorAllZeros()
195 N->getOperand(i).getOpcode() != ISD::UNDEF) in isBuildVectorAllZeros()
209 if (N->getOperand(0).getOpcode() == ISD::UNDEF) in isScalarToVector()
216 if (V.getOpcode() != ISD::UNDEF) in isScalarToVector()
232 if (N->getOperand(i).getOpcode() != ISD::UNDEF) in allOperandsUndef()
1323 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) in getVectorShuffle()
1343 if (N1.getOpcode() == ISD::UNDEF) in getVectorShuffle()
1349 bool N2Undef = N2.getOpcode() == ISD::UNDEF; in getVectorShuffle()
[all …]
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| D | DAGCombiner.cpp | 1379 if (N0.getOpcode() == ISD::UNDEF) in visitADD()
1381 if (N1.getOpcode() == ISD::UNDEF) in visitADD()
1671 if (N0.getOpcode() == ISD::UNDEF) in visitSUB()
1673 if (N1.getOpcode() == ISD::UNDEF) in visitSUB()
1753 if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF) in visitMUL()
1908 if (N0.getOpcode() == ISD::UNDEF) in visitSDIV()
1911 if (N1.getOpcode() == ISD::UNDEF) in visitSDIV()
1960 if (N0.getOpcode() == ISD::UNDEF) in visitUDIV()
1963 if (N1.getOpcode() == ISD::UNDEF) in visitUDIV()
2002 if (N0.getOpcode() == ISD::UNDEF) in visitSREM()
[all …]
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| D | SelectionDAGDumper.cpp | 131 case ISD::UNDEF: return "undef"; in getOperationName()
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| D | LegalizeVectorTypes.cpp | 65 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break; in ScalarizeVectorResult()
319 if (Arg.getOpcode() == ISD::UNDEF) in ScalarizeVecRes_VECTOR_SHUFFLE()
479 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break; in SplitVectorResult()
1299 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break; in WidenVectorResult()
1782 if (N->getOperand(i).getOpcode() != ISD::UNDEF) in WidenVecRes_CONCAT_VECTORS()
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| D | LegalizeDAG.cpp | 1447 if (Node->getOperand(i).getOpcode() == ISD::UNDEF) continue; in ExpandVectorBuildThroughStack()
1703 if (V.getOpcode() == ISD::UNDEF) in ExpandBUILD_VECTOR()
1746 assert(Node->getOperand(i).getOpcode() == ISD::UNDEF); in ExpandBUILD_VECTOR()
1763 if (V.getOpcode() == ISD::UNDEF) in ExpandBUILD_VECTOR()
2669 case ISD::UNDEF: { in ExpandNode()
3405 Tmp3 = (Tmp2.getOpcode() == ISD::UNDEF) ? Tmp2 : in ExpandNode()
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| D | LegalizeFloatTypes.cpp | 98 case ISD::UNDEF: R = SoftenFloatRes_UNDEF(N); break; in SoftenFloatResult()
837 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break; in ExpandFloatResult()
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| D | LegalizeIntegerTypes.cpp | 77 case ISD::UNDEF: Res = PromoteIntRes_UNDEF(N); break; in PromoteIntegerResult()
1090 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break; in ExpandIntegerResult()
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| /external/openssl/crypto/x509v3/ |
| D | v3_info.c | 189 #ifdef UNDEF in i2a_ACCESS_DESCRIPTION()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 166 UNDEF, enumerator
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| D | SelectionDAG.h | 541 return getNode(ISD::UNDEF, DebugLoc(), VT);
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| D | SelectionDAGNodes.h | 1616 assert((getOffset().getOpcode() == ISD::UNDEF || isIndexed()) &&
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| /external/llvm/test/CodeGen/X86/ |
| D | palignr.ll | 65 ; was an UNDEF.)
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| /external/llvm/lib/Target/CellSPU/ |
| D | SPUISelDAGToDAG.cpp | 509 ||Opc == ISD::UNDEF in DFormAddressPredicate()
519 if (Offs.getOpcode() == ISD::Constant || Offs.getOpcode() == ISD::UNDEF) { in DFormAddressPredicate()
520 if (Offs.getOpcode() == ISD::UNDEF) in DFormAddressPredicate()
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| D | SPUOperands.td | 40 if (N->getOperand(i).getOpcode() == ISD::UNDEF) continue;
66 if (N->getOperand(i).getOpcode() == ISD::UNDEF) continue;
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| D | SPUISelLowering.cpp | 1516 if (N->getOperand(i).getOpcode() == ISD::UNDEF) continue; in getVecImm()
1843 if (V2.getOpcode() == ISD::UNDEF) V2 = V1; in LowerVECTOR_SHUFFLE()
2176 if (IdxOp.getOpcode() != ISD::UNDEF) { in LowerINSERT_VECTOR_ELT()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelDAGToDAG.cpp | 671 if (!(N.getOpcode() == ISD::UNDEF) && in UndefOrImm()
675 if (N.getOpcode() == ISD::UNDEF) in UndefOrImm()
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| D | NVPTXISelLowering.cpp | 960 InVals.push_back(DAG.getNode(ISD::UNDEF, dl, ObjectVT)); in LowerFormalArguments()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 76 if (Vec.getOpcode() == ISD::UNDEF) in Extract128BitVector()
104 if (Vec.getOpcode() == ISD::UNDEF) in Insert128BitVector()
617 setOperationAction(ISD::UNDEF, MVT::f64, Expand); in X86TargetLowering()
644 setOperationAction(ISD::UNDEF, MVT::f64, Expand); in X86TargetLowering()
645 setOperationAction(ISD::UNDEF, MVT::f32, Expand); in X86TargetLowering()
670 setOperationAction(ISD::UNDEF, MVT::f80, Expand); in X86TargetLowering()
3531 SDValue UndefNode = DAG.getNode(ISD::UNDEF, dl, VT); in Compact8x32ShuffleNode()
4190 case ISD::UNDEF: in WillBeConstantPoolLoad()
4258 if (Opc == ISD::UNDEF || ISD::isBuildVectorAllZeros(V2.getNode())) in isZeroShuffle()
4265 if (Opc == ISD::UNDEF || ISD::isBuildVectorAllZeros(V1.getNode())) in isZeroShuffle()
[all …]
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| /external/icu4c/data/ |
| D | makedata.mak | 175 !UNDEF ICUDATA_SOURCE_ARCHIVE
212 !UNDEF BUILD_SPECIAL_CNV_FILES
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1213 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerCallResult()
2639 ArgValue = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerFormalArguments()
4180 if (V.getOpcode() == ISD::UNDEF) in LowerBUILD_VECTOR()
4302 if (V.getOpcode() == ISD::UNDEF) in ReconstructShuffle()
4407 if (Entry.getOpcode() == ISD::UNDEF) { in ReconstructShuffle()
4567 if (V2.getNode()->getOpcode() == ISD::UNDEF) in LowerVECTOR_SHUFFLEv8i8()
4610 if (V1.getOperand(i).getOpcode() != ISD::UNDEF) { in LowerVECTOR_SHUFFLE()
4751 if (Op0.getOpcode() != ISD::UNDEF) in LowerCONCAT_VECTORS()
4755 if (Op1.getOpcode() != ISD::UNDEF) in LowerCONCAT_VECTORS()
8140 if (Concat0Op1.getOpcode() != ISD::UNDEF || in PerformVECTOR_SHUFFLECombine()
[all …]
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 749 if (N->getOperand(i).getOpcode() == ISD::UNDEF) continue; in get_VSPLTI_elt()
795 if (N->getOperand(i).getOpcode() == ISD::UNDEF) continue; in get_VSPLTI_elt()
4342 if (V2.getOpcode() == ISD::UNDEF) { in LowerVECTOR_SHUFFLE()
4429 if (V2.getOpcode() == ISD::UNDEF) V2 = V1; in LowerVECTOR_SHUFFLE()
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