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Searched refs:UseMI (Results 1 – 25 of 29) sorted by relevance

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/external/llvm/lib/CodeGen/
DLiveRangeEdit.cpp155 MachineInstr *DefMI = 0, *UseMI = 0; in foldAsLoad() local
169 if (UseMI && UseMI != MI) in foldAsLoad()
174 UseMI = MI; in foldAsLoad()
177 if (!DefMI || !UseMI) in foldAsLoad()
184 LIS.getInstructionIndex(UseMI))) in foldAsLoad()
194 << " into single use: " << *UseMI); in foldAsLoad()
197 if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second) in foldAsLoad()
200 MachineInstr *FoldMI = TII.foldMemoryOperand(UseMI, Ops, DefMI); in foldAsLoad()
204 LIS.ReplaceMachineInstrInMaps(UseMI, FoldMI); in foldAsLoad()
205 UseMI->eraseFromParent(); in foldAsLoad()
DPeepholeOptimizer.cpp190 MachineInstr *UseMI = &*UI; in INITIALIZE_PASS_DEPENDENCY() local
191 if (UseMI == MI) in INITIALIZE_PASS_DEPENDENCY()
194 if (UseMI->isPHI()) { in INITIALIZE_PASS_DEPENDENCY()
220 if (UseMI->getOpcode() == TargetOpcode::SUBREG_TO_REG) in INITIALIZE_PASS_DEPENDENCY()
223 MachineBasicBlock *UseMBB = UseMI->getParent(); in INITIALIZE_PASS_DEPENDENCY()
226 if (!LocalMIs.count(UseMI)) in INITIALIZE_PASS_DEPENDENCY()
266 MachineInstr *UseMI = UseMO->getParent(); in INITIALIZE_PASS_DEPENDENCY() local
267 MachineBasicBlock *UseMBB = UseMI->getParent(); in INITIALIZE_PASS_DEPENDENCY()
278 MachineInstr *Copy = BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(), in INITIALIZE_PASS_DEPENDENCY()
DMachineTraceMetrics.cpp543 static bool getDataDeps(const MachineInstr *UseMI, in getDataDeps() argument
547 for (ConstMIOperands MO(UseMI); MO.isValid(); ++MO) { in getDataDeps()
567 static void getPHIDeps(const MachineInstr *UseMI, in getPHIDeps() argument
574 assert(UseMI->isPHI() && UseMI->getNumOperands() % 2 && "Bad PHI"); in getPHIDeps()
575 for (unsigned i = 1; i != UseMI->getNumOperands(); i += 2) { in getPHIDeps()
576 if (UseMI->getOperand(i + 1).getMBB() == Pred) { in getPHIDeps()
577 unsigned Reg = UseMI->getOperand(i).getReg(); in getPHIDeps()
603 static void updatePhysDepsDownwards(const MachineInstr *UseMI, in updatePhysDepsDownwards() argument
610 for (ConstMIOperands MO(UseMI); MO.isValid(); ++MO) { in updatePhysDepsDownwards()
645 for (MCRegUnitIterator Units(UseMI->getOperand(DefOp).getReg(), TRI); in updatePhysDepsDownwards()
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DRegisterScavenging.cpp264 MachineBasicBlock::iterator &UseMI) { in findSurvivorReg() argument
322 UseMI = RestorePointMI; in findSurvivorReg()
351 MachineBasicBlock::iterator UseMI; in scavengeRegister() local
352 unsigned SReg = findSurvivorReg(I, Candidates, 25, UseMI); in scavengeRegister()
368 if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) { in scavengeRegister()
377 TII->loadRegFromStackSlot(*MBB, UseMI, SReg, ScavengingFrameIndex, RC, TRI); in scavengeRegister()
378 II = prior(UseMI); in scavengeRegister()
382 ScavengeRestore = prior(UseMI); in scavengeRegister()
DTwoAddressInstructionPass.cpp421 MachineInstr &UseMI = *MRI->use_nodbg_begin(Reg); in findOnlyInterestingUse() local
422 if (UseMI.getParent() != MBB) in findOnlyInterestingUse()
426 if (isCopyToReg(UseMI, TII, SrcReg, DstReg, IsSrcPhys, IsDstPhys)) { in findOnlyInterestingUse()
428 return &UseMI; in findOnlyInterestingUse()
431 if (isTwoAddrUse(UseMI, Reg, DstReg)) { in findOnlyInterestingUse()
433 return &UseMI; in findOnlyInterestingUse()
641 while (MachineInstr *UseMI = findOnlyInterestingUse(Reg, MBB, MRI, TII,IsCopy, in ScanUses() local
643 if (IsCopy && !Processed.insert(UseMI)) in ScanUses()
646 DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(UseMI); in ScanUses()
1549 MachineInstr *UseMI = &*UI; in CoalesceExtSubRegs() local
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DRegisterCoalescer.cpp599 MachineInstr *UseMI = &*UI; in removeCopyByCommutingDef() local
600 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI); in removeCopyByCommutingDef()
605 if (UseMI->isRegTiedToDefOperand(UI.getOperandNo())) in removeCopyByCommutingDef()
644 MachineInstr *UseMI = &*UI; in removeCopyByCommutingDef() local
646 if (UseMI->isDebugValue()) { in removeCopyByCommutingDef()
652 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI).getRegSlot(true); in removeCopyByCommutingDef()
662 if (UseMI == CopyMI) in removeCopyByCommutingDef()
664 if (!UseMI->isCopy()) in removeCopyByCommutingDef()
666 if (UseMI->getOperand(0).getReg() != IntB.reg || in removeCopyByCommutingDef()
667 UseMI->getOperand(0).getSubReg()) in removeCopyByCommutingDef()
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DOptimizePHIs.cpp144 MachineInstr *UseMI = &*I; in IsDeadPHICycle() local
145 if (!UseMI->isPHI() || !IsDeadPHICycle(UseMI, PHIsInCycle)) in IsDeadPHICycle()
DDeadMachineInstructionElim.cpp148 MachineInstr *UseMI = Use.getParent(); in runOnMachineFunction() local
149 if (UseMI==MI) in runOnMachineFunction()
152 UseMI->getOperand(0).setReg(0U); in runOnMachineFunction()
DMachineLICM.cpp983 MachineInstr *UseMI = &*UI; in HasLoopPHIUse() local
985 if (UseMI->isPHI()) { in HasLoopPHIUse()
988 if (CurLoop->contains(UseMI)) in HasLoopPHIUse()
993 if (isExitBlock(UseMI->getParent())) in HasLoopPHIUse()
998 if (UseMI->isCopy() && CurLoop->contains(UseMI)) in HasLoopPHIUse()
999 Work.push_back(UseMI); in HasLoopPHIUse()
1016 MachineInstr *UseMI = &*I; in HasHighOperandLatency() local
1017 if (UseMI->isCopyLike()) in HasHighOperandLatency()
1019 if (!CurLoop->contains(UseMI->getParent())) in HasHighOperandLatency()
1021 for (unsigned i = 0, e = UseMI->getNumOperands(); i != e; ++i) { in HasHighOperandLatency()
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DScheduleDAGInstrs.cpp253 MachineInstr *UseMI = UseSU->getInstr(); in addPhysRegDataDeps() local
263 const MCInstrDesc &UseMCID = UseMI->getDesc(); in addPhysRegDataDeps()
264 int RegUseIndex = UseMI->findRegisterUseOperandIdx(*Alias); in addPhysRegDataDeps()
267 (UseMI->mayLoad() || UseMI->mayStore()) && in addPhysRegDataDeps()
279 (UseOp < 0 ? 0 : UseMI), UseOp); in addPhysRegDataDeps()
283 (UseOp < 0 ? 0 : UseMI), UseOp, in addPhysRegDataDeps()
351 const MachineInstr *UseMI = UseMO->getParent(); in addPhysRegDeps() local
352 unsigned UseMOIdx = UseMO - &UseMI->getOperand(0); in addPhysRegDeps()
353 const MCInstrDesc &UseMCID = UseMI->getDesc(); in addPhysRegDeps()
364 if (UseMI->getParent() != MI->getParent()) { in addPhysRegDeps()
DMachineSSAUpdater.cpp222 MachineInstr *UseMI = U.getParent(); in RewriteUse() local
224 if (UseMI->isPHI()) { in RewriteUse()
225 MachineBasicBlock *SourceBB = findCorrespondingPred(UseMI, &U); in RewriteUse()
228 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); in RewriteUse()
DTailDuplication.cpp256 MachineInstr *UseMI = &*UI; in TailDuplicateAndUpdate() local
258 if (UseMI->isDebugValue()) { in TailDuplicateAndUpdate()
263 UseMI->eraseFromParent(); in TailDuplicateAndUpdate()
266 if (UseMI->getParent() == DefBB && !UseMI->isPHI()) in TailDuplicateAndUpdate()
333 MachineInstr *UseMI = &*UI; in isDefLiveOut() local
334 if (UseMI->isDebugValue()) in isDefLiveOut()
336 if (UseMI->getParent() != BB) in isDefLiveOut()
DTargetInstrInfoImpl.cpp601 const MachineInstr *UseMI, unsigned UseIdx) const { in getOperandLatency() argument
603 unsigned UseClass = UseMI->getDesc().getSchedClass(); in getOperandLatency()
652 const MachineInstr *UseMI, unsigned UseIdx, in computeOperandLatency() argument
662 if (UseMI) in computeOperandLatency()
663 OperLatency = getOperandLatency(ItinData, DefMI, DefIdx, UseMI, UseIdx); in computeOperandLatency()
DLiveIntervalAnalysis.cpp619 MachineInstr *UseMI = I.skipInstruction();) { in shrinkToUses()
620 if (UseMI->isDebugValue() || !UseMI->readsVirtualRegister(li->reg)) in shrinkToUses()
622 SlotIndex Idx = getInstructionIndex(UseMI).getRegSlot(); in shrinkToUses()
629 DEBUG(dbgs() << Idx << '\t' << *UseMI in shrinkToUses()
DInlineSpiller.cpp235 MachineInstr *UseMI = 0; in isSnippet() local
256 if (UseMI && MI != UseMI) in isSnippet()
258 UseMI = MI; in isSnippet()
DRegAllocFast.cpp583 const MachineInstr &UseMI = *MRI->use_nodbg_begin(VirtReg); in defineVirtReg() local
585 if (UseMI.isCopyLike()) in defineVirtReg()
586 Hint = UseMI.getOperand(0).getReg(); in defineVirtReg()
/external/llvm/lib/Target/ARM/
DMLxExpansionPass.cpp121 MachineInstr *UseMI = &*MRI->use_nodbg_begin(Reg); in getDefReg() local
122 if (UseMI->getParent() != MBB) in getDefReg()
125 while (UseMI->isCopy() || UseMI->isInsertSubreg()) { in getDefReg()
126 Reg = UseMI->getOperand(0).getReg(); in getDefReg()
130 UseMI = &*MRI->use_nodbg_begin(Reg); in getDefReg()
131 if (UseMI->getParent() != MBB) in getDefReg()
DARMBaseInstrInfo.cpp2229 bool ARMBaseInstrInfo::FoldImmediate(MachineInstr *UseMI, in FoldImmediate() argument
2253 const MCInstrDesc &UseMCID = UseMI->getDesc(); in FoldImmediate()
2256 if (UseMI->getOperand(NumOps-1).getReg() == ARM::CPSR) in FoldImmediate()
2262 unsigned UseOpc = UseMI->getOpcode(); in FoldImmediate()
2277 Commute = UseMI->getOperand(2).getReg() != Reg; in FoldImmediate()
2329 unsigned Reg1 = UseMI->getOperand(OpIdx).getReg(); in FoldImmediate()
2330 bool isKill = UseMI->getOperand(OpIdx).isKill(); in FoldImmediate()
2332 AddDefaultCC(AddDefaultPred(BuildMI(*UseMI->getParent(), in FoldImmediate()
2333 UseMI, UseMI->getDebugLoc(), in FoldImmediate()
2337 UseMI->setDesc(get(NewUseOpc)); in FoldImmediate()
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DARMBaseInstrInfo.h214 virtual bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI,
223 const MachineInstr *UseMI, unsigned UseIdx) const;
273 const MachineInstr *UseMI, unsigned UseIdx) const;
DThumb1RegisterInfo.h61 MachineBasicBlock::iterator &UseMI,
DThumb1RegisterInfo.cpp551 MachineBasicBlock::iterator &UseMI, in saveScavengerRegister() argument
568 for (MachineBasicBlock::iterator II = I; !done && II != UseMI ; ++II) { in saveScavengerRegister()
575 UseMI = II; in saveScavengerRegister()
583 UseMI = II; in saveScavengerRegister()
590 AddDefaultPred(BuildMI(MBB, UseMI, DL, TII.get(ARM::tMOVr)). in saveScavengerRegister()
/external/llvm/include/llvm/Target/
DTargetInstrInfo.h758 virtual bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, in FoldImmediate() argument
792 const MachineInstr *UseMI,
801 const MachineInstr *UseMI, unsigned UseIdx,
840 const MachineInstr *UseMI, unsigned UseIdx) const { in hasHighOperandLatency() argument
1026 const MachineInstr *UseMI,
/external/llvm/lib/Target/PowerPC/
DPPCCTRLoops.cpp498 MachineInstr *UseMI = Use.getParent(); in isDead() local
500 if (MI != UseMI) { in isDead()
541 MachineInstr *UseMI = Use.getParent(); in removeIfDead() local
542 if (UseMI==MI) in removeIfDead()
546 UseMI->getOperand(0).setReg(0U); in removeIfDead()
/external/llvm/include/llvm/CodeGen/
DRegisterScavenging.h164 MachineBasicBlock::iterator &UseMI);
/external/llvm/lib/Target/X86/
DX86InstrInfo.h373 const MachineInstr *UseMI, unsigned UseIdx) const;

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