Searched refs:cfc1 (Results 1 – 13 of 13) sorted by relevance
| /external/llvm/test/MC/Mips/ |
| D | mips-fpu-instructions.s | 142 # CHECK: cfc1 $6, $fcc0 # encoding: [0x00,0x00,0x46,0x44]
153 cfc1 $a2,$0
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| /external/v8/test/cctest/ |
| D | test-assembler-mips.cc | 1174 __ cfc1(a1, FCSR); in TEST() local
1197 __ cfc1(a2, FCSR); \ in TEST()
1203 __ cfc1(a2, FCSR); \ in TEST()
1209 __ cfc1(a2, FCSR); \ in TEST()
1215 __ cfc1(a2, FCSR); \ in TEST()
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| /external/qemu/target-mips/ |
| D | helper.h | 167 DEF_HELPER_1(cfc1, tl, i32)
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| D | translate.c | 5368 gen_helper_1i(cfc1, t0, rt); in gen_mftr()
5822 gen_helper_1i(cfc1, t0, fs); in gen_cp1()
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| /external/llvm/test/MC/Disassembler/Mips/ |
| D | mips32r2.txt | 162 # CHECK: cfc1 $6, $7
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| D | mips32r2_le.txt | 162 # CHECK: cfc1 $6, $7
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| D | mips32.txt | 162 # CHECK: cfc1 $6, $7
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| D | mips32_le.txt | 162 # CHECK: cfc1 $6, $7
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| /external/v8/src/mips/ |
| D | macro-assembler-mips.cc | 1235 cfc1(scratch, FCSR); in Movt()
1261 cfc1(scratch, FCSR); in Movf()
1413 cfc1(scratch1, FCSR); in EmitFPUTruncate()
1434 cfc1(except_flag, FCSR); in EmitFPUTruncate()
1544 cfc1(scratch2, FCSR); in EmitECMATruncate()
1550 cfc1(scratch, FCSR); in EmitECMATruncate()
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| D | assembler-mips.h | 804 void cfc1(Register rt, FPUControlRegister fs);
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| D | assembler-mips.cc | 1667 void Assembler::cfc1(Register rt, FPUControlRegister fs) { in cfc1() function in v8::internal::Assembler
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| D | stub-cache-mips.cc | 2069 __ cfc1(a3, FCSR); in CompileMathFloorCall() local
2082 __ cfc1(t5, FCSR); in CompileMathFloorCall() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrFPU.td | 226 "cfc1\t$rt, $fs", []>;
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