Searched refs:getSORegOpc (Results 1 – 7 of 7) sorted by relevance
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 112 static inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) { in getSORegOpc() function
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 403 Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal), in SelectImmShifterOperand()
430 Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal), in SelectRegShifterOperand()
1162 Opc = getI32Imm(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal)); in SelectT2ShifterOperandReg()
2533 ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, ShImm); in Select()
2549 ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, ShImm); in Select()
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| D | ARMExpandPseudoInsts.cpp | 832 .addImm(ARM_AM::getSORegOpc((Opcode == ARM::MOVsrl_flag ? in ExpandMI()
845 .addImm(ARM_AM::getSORegOpc(ARM_AM::rrx, 0))) in ExpandMI()
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| D | ARMFastISel.cpp | 2659 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, ShiftImm)); in SelectShift()
2662 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, 0)); in SelectShift()
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| D | ARMBaseInstrInfo.cpp | 174 unsigned SOOpc = ARM_AM::getSORegOpc(ShOpc, Amt); in convertToThreeAddress()
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| D | ARMISelLowering.cpp | 6043 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2)))); in EmitSjLjDispatchBlock()
6180 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2)))); in EmitSjLjDispatchBlock()
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 1455 ARM_AM::getSORegOpc(RegShiftedReg.ShiftTy, RegShiftedReg.ShiftImm))); in addRegShiftedRegOperands()
1466 ARM_AM::getSORegOpc(RegShiftedImm.ShiftTy, Imm))); in addRegShiftedImmOperands()
6869 unsigned Shifter = ARM_AM::getSORegOpc(ShiftTy, 0); in processInstruction()
6900 unsigned Shifter = ARM_AM::getSORegOpc(ShiftTy, Amt); in processInstruction()
6914 unsigned Shifter = ARM_AM::getSORegOpc(ARM_AM::rrx, 0); in processInstruction()
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