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Searched refs:hasV6Ops (Results 1 – 8 of 8) sorted by relevance

/external/llvm/lib/Target/ARM/
DARMSubtarget.cpp127 if (!StrictAlign && hasV6Ops() && isTargetDarwin()) in ARMSubtarget()
DARMSubtarget.h196 bool hasV6Ops() const { return HasV6Ops; } in hasV6Ops() function
DARMISelDAGToDAG.cpp2619 return CurDAG->getMachineNode(Subtarget->hasV6Ops() ? in Select()
2635 return CurDAG->getMachineNode(Subtarget->hasV6Ops() ? in Select()
2651 return CurDAG->getMachineNode(Subtarget->hasV6Ops() ? in Select()
2667 return CurDAG->getMachineNode(Subtarget->hasV6Ops() ? in Select()
DARMISelLowering.cpp605 if (Subtarget->isThumb1Only() || !Subtarget->hasV6Ops() in ARMTargetLowering()
635 if (!Subtarget->hasV6Ops()) in ARMTargetLowering()
679 (Subtarget->hasV6Ops() && !Subtarget->isThumb())) { in ARMTargetLowering()
721 if (!Subtarget->hasV6Ops()) { in ARMTargetLowering()
804 if (Subtarget->hasV6Ops()) in ARMTargetLowering()
2391 assert(Subtarget->hasV6Ops() && !Subtarget->isThumb() && in LowerMEMBARRIER()
2421 assert(Subtarget->hasV6Ops() && !Subtarget->isThumb() && in LowerATOMIC_FENCE()
8731 if (N->getOpcode() == ISD::SRL && VT == MVT::i32 && ST->hasV6Ops()) { in PerformShiftCombine()
9501 if (!Subtarget->hasV6Ops()) in ExpandInlineAsm()
DARMFastISel.cpp2560 if (!Subtarget->hasV6Ops()) return 0; in ARMEmitIntExt()
2567 if (!Subtarget->hasV6Ops()) return 0; in ARMEmitIntExt()
DARMLoadStoreOptimizer.cpp1597 unsigned ReqAlign = STI->hasV6Ops() in CanFormLdStDWord()
DARMInstrInfo.td189 def HasV6 : Predicate<"Subtarget->hasV6Ops()">,
191 def NoV6 : Predicate<"!Subtarget->hasV6Ops()">;
/external/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp130 bool hasV6Ops() const { in hasV6Ops() function in __anon1a66d4c80111::ARMAsmParser
7452 else if (Opc == ARM::tMOVr && isThumbOne() && !hasV6Ops() && in checkTargetMatchPredicate()