Home
last modified time | relevance | path

Searched refs:isCortexA9 (Results 1 – 8 of 8) sorted by relevance

/external/llvm/lib/Target/ARM/
DARMHazardRecognizer.cpp50 !(STI.isCortexA9() && (LastMI->mayLoad() || LastMI->mayStore())) && in getHazardType()
DARMSubtarget.h201 bool isCortexA9() const { return ARMProcFamily == CortexA9; } in isCortexA9() function
DARMTargetMachine.cpp153 if (getOptLevel() != CodeGenOpt::None && getARMSubtarget().isCortexA9()) in addPreRegAlloc()
DARMBaseInstrInfo.cpp2433 } else if (Subtarget.isCortexA9()) { in getNumMicroOps()
2466 } else if (Subtarget.isCortexA9()) { in getVLDMDefCycle()
2510 } else if (Subtarget.isCortexA9()) { in getLDMDefCycle()
2541 } else if (Subtarget.isCortexA9()) { in getVSTMUseCycle()
2582 } else if (Subtarget.isCortexA9()) { in getSTMUseCycle()
2767 if (Subtarget.isCortexA8() || Subtarget.isCortexA9()) { in adjustDefLatency()
2794 if (DefAlign < 8 && Subtarget.isCortexA9()) { in adjustDefLatency()
2952 return Subtarget.isCortexA9() ? 1 : 20; in getOperandLatency()
3018 if (Subtarget.isCortexA9()) in getOperandLatency()
3035 (Subtarget.isCortexA8() || Subtarget.isCortexA9())) { in getOperandLatency()
[all …]
DMLxExpansionPass.cpp319 isA9 = STI->isCortexA9(); in runOnMachineFunction()
DARMISelDAGToDAG.cpp339 if (!Subtarget->isCortexA8() && !Subtarget->isCortexA9()) in hasNoVMLxHazardUse()
377 if (!Subtarget->isCortexA9()) in isShifterOpProfitable()
489 (!Subtarget->isCortexA9() || N.hasOneUse())) { in SelectLdStSOReg()
553 !(Subtarget->isCortexA9() || N.getOperand(0).hasOneUse())) { in SelectLdStSOReg()
587 (!Subtarget->isCortexA9() || N.hasOneUse())) { in SelectAddrMode2Worker()
653 if (Subtarget->isCortexA9() && !N.hasOneUse()) { in SelectAddrMode2Worker()
691 !(Subtarget->isCortexA9() || N.getOperand(0).hasOneUse())) { in SelectAddrMode2Worker()
DARMBaseRegisterInfo.cpp479 if (!STI.isCortexA9()) in avoidWriteAfterWrite()
DARMISelLowering.cpp827 predictableSelectIsExpensive = Subtarget->isCortexA9(); in ARMTargetLowering()