1 //===-- X86RegisterInfo.h - X86 Register Information Impl -------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the X86 implementation of the TargetRegisterInfo class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef X86REGISTERINFO_H 15 #define X86REGISTERINFO_H 16 17 #include "llvm/Target/TargetRegisterInfo.h" 18 19 #define GET_REGINFO_HEADER 20 #include "X86GenRegisterInfo.inc" 21 22 namespace llvm { 23 class Type; 24 class TargetInstrInfo; 25 class X86TargetMachine; 26 27 class X86RegisterInfo : public X86GenRegisterInfo { 28 public: 29 X86TargetMachine &TM; 30 const TargetInstrInfo &TII; 31 32 private: 33 /// Is64Bit - Is the target 64-bits. 34 /// 35 bool Is64Bit; 36 37 /// IsWin64 - Is the target on of win64 flavours 38 /// 39 bool IsWin64; 40 41 /// SlotSize - Stack slot size in bytes. 42 /// 43 unsigned SlotSize; 44 45 /// StackPtr - X86 physical register used as stack ptr. 46 /// 47 unsigned StackPtr; 48 49 /// FramePtr - X86 physical register used as frame ptr. 50 /// 51 unsigned FramePtr; 52 53 /// BasePtr - X86 physical register used as a base ptr in complex stack 54 /// frames. I.e., when we need a 3rd base, not just SP and FP, due to 55 /// variable size stack objects. 56 unsigned BasePtr; 57 58 public: 59 X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii); 60 61 /// getX86RegNum - Returns the native X86 register number for the given LLVM 62 /// register identifier. 63 static unsigned getX86RegNum(unsigned RegNo); 64 65 // FIXME: This should be tablegen'd like getDwarfRegNum is 66 int getSEHRegNum(unsigned i) const; 67 68 /// getCompactUnwindRegNum - This function maps the register to the number for 69 /// compact unwind encoding. Return -1 if the register isn't valid. 70 int getCompactUnwindRegNum(unsigned RegNum, bool isEH) const; 71 72 /// Code Generation virtual methods... 73 /// 74 virtual bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const; 75 76 /// getMatchingSuperRegClass - Return a subclass of the specified register 77 /// class A so that each register in it has a sub-register of the 78 /// specified sub-register index which is in the specified register class B. 79 virtual const TargetRegisterClass * 80 getMatchingSuperRegClass(const TargetRegisterClass *A, 81 const TargetRegisterClass *B, unsigned Idx) const; 82 83 virtual const TargetRegisterClass * 84 getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const; 85 86 const TargetRegisterClass* 87 getLargestLegalSuperClass(const TargetRegisterClass *RC) const; 88 89 /// getPointerRegClass - Returns a TargetRegisterClass used for pointer 90 /// values. 91 const TargetRegisterClass * 92 getPointerRegClass(const MachineFunction &MF, unsigned Kind = 0) const; 93 94 /// getCrossCopyRegClass - Returns a legal register class to copy a register 95 /// in the specified class to or from. Returns NULL if it is possible to copy 96 /// between a two registers of the specified class. 97 const TargetRegisterClass * 98 getCrossCopyRegClass(const TargetRegisterClass *RC) const; 99 100 unsigned getRegPressureLimit(const TargetRegisterClass *RC, 101 MachineFunction &MF) const; 102 103 /// getCalleeSavedRegs - Return a null-terminated list of all of the 104 /// callee-save registers on this target. 105 const uint16_t *getCalleeSavedRegs(const MachineFunction* MF = 0) const; 106 const uint32_t *getCallPreservedMask(CallingConv::ID) const; 107 108 /// getReservedRegs - Returns a bitset indexed by physical register number 109 /// indicating if a register is a special register that has particular uses and 110 /// should be considered unavailable at all times, e.g. SP, RA. This is used by 111 /// register scavenger to determine what registers are free. 112 BitVector getReservedRegs(const MachineFunction &MF) const; 113 114 bool hasBasePointer(const MachineFunction &MF) const; 115 116 bool canRealignStack(const MachineFunction &MF) const; 117 118 bool needsStackRealignment(const MachineFunction &MF) const; 119 120 bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg, 121 int &FrameIdx) const; 122 123 void eliminateCallFramePseudoInstr(MachineFunction &MF, 124 MachineBasicBlock &MBB, 125 MachineBasicBlock::iterator MI) const; 126 127 void eliminateFrameIndex(MachineBasicBlock::iterator MI, 128 int SPAdj, RegScavenger *RS = NULL) const; 129 130 // Debug information queries. 131 unsigned getFrameRegister(const MachineFunction &MF) const; getStackRegister()132 unsigned getStackRegister() const { return StackPtr; } getBaseRegister()133 unsigned getBaseRegister() const { return BasePtr; } 134 // FIXME: Move to FrameInfok getSlotSize()135 unsigned getSlotSize() const { return SlotSize; } 136 137 // Exception handling queries. 138 unsigned getEHExceptionRegister() const; 139 unsigned getEHHandlerRegister() const; 140 }; 141 142 // getX86SubSuperRegister - X86 utility function. It returns the sub or super 143 // register of a specific X86 register. 144 // e.g. getX86SubSuperRegister(X86::EAX, EVT::i16) return X86:AX 145 unsigned getX86SubSuperRegister(unsigned, EVT, bool High=false); 146 147 } // End llvm namespace 148 149 #endif 150