1; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -show-mc-encoding | FileCheck %s 2 3define i32 @test1(i32 %X, i32* %y) nounwind { 4 %tmp = load i32* %y ; <i32> [#uses=1] 5 %tmp.upgrd.1 = icmp eq i32 %tmp, 0 ; <i1> [#uses=1] 6 br i1 %tmp.upgrd.1, label %ReturnBlock, label %cond_true 7 8cond_true: ; preds = %0 9 ret i32 1 10 11ReturnBlock: ; preds = %0 12 ret i32 0 13; CHECK: test1: 14; CHECK: cmpl $0, (%rsi) 15} 16 17define i32 @test2(i32 %X, i32* %y) nounwind { 18 %tmp = load i32* %y ; <i32> [#uses=1] 19 %tmp1 = shl i32 %tmp, 3 ; <i32> [#uses=1] 20 %tmp1.upgrd.2 = icmp eq i32 %tmp1, 0 ; <i1> [#uses=1] 21 br i1 %tmp1.upgrd.2, label %ReturnBlock, label %cond_true 22 23cond_true: ; preds = %0 24 ret i32 1 25 26ReturnBlock: ; preds = %0 27 ret i32 0 28; CHECK: test2: 29; CHECK: movl (%rsi), %eax 30; CHECK: shll $3, %eax 31; CHECK: testl %eax, %eax 32} 33 34define i64 @test3(i64 %x) nounwind { 35 %t = icmp eq i64 %x, 0 36 %r = zext i1 %t to i64 37 ret i64 %r 38; CHECK: test3: 39; CHECK: testq %rdi, %rdi 40; CHECK: sete %al 41; CHECK: movzbl %al, %eax 42; CHECK: ret 43} 44 45define i64 @test4(i64 %x) nounwind { 46 %t = icmp slt i64 %x, 1 47 %r = zext i1 %t to i64 48 ret i64 %r 49; CHECK: test4: 50; CHECK: testq %rdi, %rdi 51; CHECK: setle %al 52; CHECK: movzbl %al, %eax 53; CHECK: ret 54} 55 56 57define i32 @test5(double %A) nounwind { 58 entry: 59 %tmp2 = fcmp ogt double %A, 1.500000e+02; <i1> [#uses=1] 60 %tmp5 = fcmp ult double %A, 7.500000e+01; <i1> [#uses=1] 61 %bothcond = or i1 %tmp2, %tmp5; <i1> [#uses=1] 62 br i1 %bothcond, label %bb8, label %bb12 63 64 bb8:; preds = %entry 65 %tmp9 = tail call i32 (...)* @foo( ) nounwind ; <i32> [#uses=1] 66 ret i32 %tmp9 67 68 bb12:; preds = %entry 69 ret i32 32 70; CHECK: test5: 71; CHECK: ucomisd LCPI4_0(%rip), %xmm0 72; CHECK: ucomisd LCPI4_1(%rip), %xmm0 73} 74 75declare i32 @foo(...) 76 77define i32 @test6() nounwind align 2 { 78 %A = alloca {i64, i64}, align 8 79 %B = getelementptr inbounds {i64, i64}* %A, i64 0, i32 1 80 %C = load i64* %B 81 %D = icmp eq i64 %C, 0 82 br i1 %D, label %T, label %F 83T: 84 ret i32 1 85 86F: 87 ret i32 0 88; CHECK: test6: 89; CHECK: cmpq $0, -8(%rsp) 90; CHECK: encoding: [0x48,0x83,0x7c,0x24,0xf8,0x00] 91} 92 93; rdar://11866926 94define i32 @test7(i64 %res) nounwind { 95entry: 96; CHECK: test7: 97; CHECK-NOT: movabsq 98; CHECK: shrq $32, %rdi 99; CHECK: testq %rdi, %rdi 100; CHECK: sete 101 %lnot = icmp ult i64 %res, 4294967296 102 %lnot.ext = zext i1 %lnot to i32 103 ret i32 %lnot.ext 104} 105 106define i32 @test8(i64 %res) nounwind { 107entry: 108; CHECK: test8: 109; CHECK-NOT: movabsq 110; CHECK: shrq $32, %rdi 111; CHECK: cmpq $3, %rdi 112 %lnot = icmp ult i64 %res, 12884901888 113 %lnot.ext = zext i1 %lnot to i32 114 ret i32 %lnot.ext 115} 116 117define i32 @test9(i64 %res) nounwind { 118entry: 119; CHECK: test9: 120; CHECK-NOT: movabsq 121; CHECK: shrq $33, %rdi 122; CHECK: testq %rdi, %rdi 123; CHECK: sete 124 %lnot = icmp ult i64 %res, 8589934592 125 %lnot.ext = zext i1 %lnot to i32 126 ret i32 %lnot.ext 127} 128 129define i32 @test10(i64 %res) nounwind { 130entry: 131; CHECK: test10: 132; CHECK-NOT: movabsq 133; CHECK: shrq $32, %rdi 134; CHECK: testq %rdi, %rdi 135; CHECK: setne 136 %lnot = icmp uge i64 %res, 4294967296 137 %lnot.ext = zext i1 %lnot to i32 138 ret i32 %lnot.ext 139} 140 141; rdar://9758774 142define i32 @test11(i64 %l) nounwind { 143entry: 144; CHECK: test11: 145; CHECK-NOT: movabsq 146; CHECK-NOT: andq 147; CHECK: shrq $47, %rdi 148; CHECK: cmpq $1, %rdi 149 %shr.mask = and i64 %l, -140737488355328 150 %cmp = icmp eq i64 %shr.mask, 140737488355328 151 %conv = zext i1 %cmp to i32 152 ret i32 %conv 153} 154