1; RUN: llc < %s -march=x86 -mcpu=pentiumpro | FileCheck %s 2 3define i32 @f(i32 %X) { 4entry: 5; CHECK: f: 6; CHECK: jns 7 %tmp1 = add i32 %X, 1 ; <i32> [#uses=1] 8 %tmp = icmp slt i32 %tmp1, 0 ; <i1> [#uses=1] 9 br i1 %tmp, label %cond_true, label %cond_next 10 11cond_true: ; preds = %entry 12 %tmp2 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0] 13 br label %cond_next 14 15cond_next: ; preds = %cond_true, %entry 16 %tmp3 = tail call i32 (...)* @baz( ) ; <i32> [#uses=0] 17 ret i32 undef 18} 19 20declare i32 @bar(...) 21 22declare i32 @baz(...) 23 24; rdar://10633221 25; rdar://11355268 26define i32 @g(i32 %a, i32 %b) nounwind { 27entry: 28; CHECK: g: 29; CHECK-NOT: test 30; CHECK: cmovs 31 %sub = sub nsw i32 %a, %b 32 %cmp = icmp sgt i32 %sub, 0 33 %cond = select i1 %cmp, i32 %sub, i32 0 34 ret i32 %cond 35} 36 37; rdar://10734411 38define i32 @h(i32 %a, i32 %b) nounwind { 39entry: 40; CHECK: h: 41; CHECK-NOT: cmp 42; CHECK: cmov 43; CHECK-NOT: movl 44; CHECK: ret 45 %cmp = icmp slt i32 %b, %a 46 %sub = sub nsw i32 %a, %b 47 %cond = select i1 %cmp, i32 %sub, i32 0 48 ret i32 %cond 49} 50define i32 @i(i32 %a, i32 %b) nounwind { 51entry: 52; CHECK: i: 53; CHECK-NOT: cmp 54; CHECK: cmov 55; CHECK-NOT: movl 56; CHECK: ret 57 %cmp = icmp sgt i32 %a, %b 58 %sub = sub nsw i32 %a, %b 59 %cond = select i1 %cmp, i32 %sub, i32 0 60 ret i32 %cond 61} 62define i32 @j(i32 %a, i32 %b) nounwind { 63entry: 64; CHECK: j: 65; CHECK-NOT: cmp 66; CHECK: cmov 67; CHECK-NOT: movl 68; CHECK: ret 69 %cmp = icmp ugt i32 %a, %b 70 %sub = sub i32 %a, %b 71 %cond = select i1 %cmp, i32 %sub, i32 0 72 ret i32 %cond 73} 74define i32 @k(i32 %a, i32 %b) nounwind { 75entry: 76; CHECK: k: 77; CHECK-NOT: cmp 78; CHECK: cmov 79; CHECK-NOT: movl 80; CHECK: ret 81 %cmp = icmp ult i32 %b, %a 82 %sub = sub i32 %a, %b 83 %cond = select i1 %cmp, i32 %sub, i32 0 84 ret i32 %cond 85} 86; redundant cmp instruction 87define i32 @l(i32 %a, i32 %b) nounwind { 88entry: 89; CHECK: l: 90; CHECK-NOT: cmp 91 %cmp = icmp slt i32 %b, %a 92 %sub = sub nsw i32 %a, %b 93 %cond = select i1 %cmp, i32 %sub, i32 %a 94 ret i32 %cond 95} 96define i32 @m(i32 %a, i32 %b) nounwind { 97entry: 98; CHECK: m: 99; CHECK-NOT: cmp 100 %cmp = icmp sgt i32 %a, %b 101 %sub = sub nsw i32 %a, %b 102 %cond = select i1 %cmp, i32 %b, i32 %sub 103 ret i32 %cond 104} 105; If EFLAGS is live-out, we can't remove cmp if there exists 106; a swapped sub. 107define i32 @l2(i32 %a, i32 %b) nounwind { 108entry: 109; CHECK: l2: 110; CHECK: cmp 111 %cmp = icmp eq i32 %b, %a 112 %sub = sub nsw i32 %a, %b 113 br i1 %cmp, label %if.then, label %if.else 114 115if.then: 116 %cmp2 = icmp sgt i32 %b, %a 117 %sel = select i1 %cmp2, i32 %sub, i32 %a 118 ret i32 %sel 119 120if.else: 121 ret i32 %sub 122} 123define i32 @l3(i32 %a, i32 %b) nounwind { 124entry: 125; CHECK: l3: 126; CHECK: sub 127; CHECK-NOT: cmp 128; CHECK: jge 129 %cmp = icmp sgt i32 %b, %a 130 %sub = sub nsw i32 %a, %b 131 br i1 %cmp, label %if.then, label %if.else 132 133if.then: 134 ret i32 %sub 135 136if.else: 137 %add = add nsw i32 %sub, 1 138 ret i32 %add 139} 140; rdar://11830760 141; When Movr0 is between sub and cmp, we need to move "Movr0" before sub. 142define i32 @l4(i32 %a, i32 %b) nounwind { 143entry: 144; CHECK: l4: 145; CHECK: xor 146; CHECK: sub 147; CHECK-NOT: cmp 148 %cmp = icmp sgt i32 %b, %a 149 %sub = sub i32 %a, %b 150 %.sub = select i1 %cmp, i32 0, i32 %sub 151 ret i32 %.sub 152} 153; rdar://11540023 154define i32 @n(i32 %x, i32 %y) nounwind { 155entry: 156; CHECK: n: 157; CHECK-NOT: sub 158; CHECK: cmp 159 %sub = sub nsw i32 %x, %y 160 %cmp = icmp slt i32 %sub, 0 161 %y.x = select i1 %cmp, i32 %y, i32 %x 162 ret i32 %y.x 163} 164; PR://13046 165define void @o() nounwind uwtable { 166entry: 167 %0 = load i16* undef, align 2 168 br i1 undef, label %if.then.i, label %if.end.i 169 170if.then.i: ; preds = %entry 171 unreachable 172 173if.end.i: ; preds = %entry 174 br i1 undef, label %sw.bb, label %sw.default 175 176sw.bb: ; preds = %if.end.i 177 br i1 undef, label %if.then44, label %if.end29 178 179if.end29: ; preds = %sw.bb 180; CHECK: o: 181; CHECK: cmp 182 %1 = urem i16 %0, 10 183 %cmp25 = icmp eq i16 %1, 0 184 %. = select i1 %cmp25, i16 2, i16 0 185 br i1 %cmp25, label %if.then44, label %sw.default 186 187sw.default: ; preds = %if.end29, %if.end.i 188 br i1 undef, label %if.then.i96, label %if.else.i97 189 190if.then.i96: ; preds = %sw.default 191 unreachable 192 193if.else.i97: ; preds = %sw.default 194 unreachable 195 196if.then44: ; preds = %if.end29, %sw.bb 197 %aModeRefSel.1.ph = phi i16 [ %., %if.end29 ], [ 3, %sw.bb ] 198 br i1 undef, label %if.then.i103, label %if.else.i104 199 200if.then.i103: ; preds = %if.then44 201 unreachable 202 203if.else.i104: ; preds = %if.then44 204 ret void 205} 206; rdar://11855129 207define i32 @p(i32 %a, i32 %b) nounwind { 208entry: 209; CHECK: p: 210; CHECK-NOT: test 211; CHECK: cmovs 212 %add = add nsw i32 %b, %a 213 %cmp = icmp sgt i32 %add, 0 214 %add. = select i1 %cmp, i32 %add, i32 0 215 ret i32 %add. 216} 217; PR13475 218; If we have sub a, b and cmp b, a and the result of cmp is used 219; by sbb, we should not optimize cmp away. 220define i32 @q(i32 %j.4, i32 %w, i32 %el) { 221; CHECK: q: 222; CHECK: sub 223; CHECK: cmp 224; CHECK-NEXT: sbb 225 %tmp532 = add i32 %j.4, %w 226 %tmp533 = icmp ugt i32 %tmp532, %el 227 %tmp534 = icmp ult i32 %w, %el 228 %or.cond = and i1 %tmp533, %tmp534 229 %tmp535 = sub i32 %el, %w 230 %j.5 = select i1 %or.cond, i32 %tmp535, i32 %j.4 231 ret i32 %j.5 232} 233; rdar://11873276 234define i8* @r(i8* %base, i32* nocapture %offset, i32 %size) nounwind { 235entry: 236; CHECK: r: 237; CHECK: sub 238; CHECK-NOT: cmp 239; CHECK: j 240; CHECK-NOT: sub 241; CHECK: ret 242 %0 = load i32* %offset, align 8 243 %cmp = icmp slt i32 %0, %size 244 br i1 %cmp, label %return, label %if.end 245 246if.end: 247 %sub = sub nsw i32 %0, %size 248 store i32 %sub, i32* %offset, align 8 249 %add.ptr = getelementptr inbounds i8* %base, i32 %sub 250 br label %return 251 252return: 253 %retval.0 = phi i8* [ %add.ptr, %if.end ], [ null, %entry ] 254 ret i8* %retval.0 255} 256