1; This test makes sure that these instructions are properly eliminated. 2; 3; RUN: opt < %s -instcombine -S | FileCheck %s 4 5define i32 @test1(i32 %A) { 6; CHECK: @test1 7; CHECK: ret i32 %A 8 %B = shl i32 %A, 0 ; <i32> [#uses=1] 9 ret i32 %B 10} 11 12define i32 @test2(i8 %A) { 13; CHECK: @test2 14; CHECK: ret i32 0 15 %shift.upgrd.1 = zext i8 %A to i32 ; <i32> [#uses=1] 16 %B = shl i32 0, %shift.upgrd.1 ; <i32> [#uses=1] 17 ret i32 %B 18} 19 20define i32 @test3(i32 %A) { 21; CHECK: @test3 22; CHECK: ret i32 %A 23 %B = ashr i32 %A, 0 ; <i32> [#uses=1] 24 ret i32 %B 25} 26 27define i32 @test4(i8 %A) { 28; CHECK: @test4 29; CHECK: ret i32 0 30 %shift.upgrd.2 = zext i8 %A to i32 ; <i32> [#uses=1] 31 %B = ashr i32 0, %shift.upgrd.2 ; <i32> [#uses=1] 32 ret i32 %B 33} 34 35 36define i32 @test5(i32 %A) { 37; CHECK: @test5 38; CHECK: ret i32 undef 39 %B = lshr i32 %A, 32 ;; shift all bits out 40 ret i32 %B 41} 42 43define i32 @test5a(i32 %A) { 44; CHECK: @test5a 45; CHECK: ret i32 undef 46 %B = shl i32 %A, 32 ;; shift all bits out 47 ret i32 %B 48} 49 50define i32 @test5b() { 51; CHECK: @test5b 52; CHECK: ret i32 -1 53 %B = ashr i32 undef, 2 ;; top two bits must be equal, so not undef 54 ret i32 %B 55} 56 57define i32 @test5b2(i32 %A) { 58; CHECK: @test5b2 59; CHECK: ret i32 -1 60 %B = ashr i32 undef, %A ;; top %A bits must be equal, so not undef 61 ret i32 %B 62} 63 64define i32 @test6(i32 %A) { 65; CHECK: @test6 66; CHECK-NEXT: mul i32 %A, 6 67; CHECK-NEXT: ret i32 68 %B = shl i32 %A, 1 ;; convert to an mul instruction 69 %C = mul i32 %B, 3 70 ret i32 %C 71} 72 73define i32 @test6a(i32 %A) { 74; CHECK: @test6a 75; CHECK-NEXT: mul i32 %A, 6 76; CHECK-NEXT: ret i32 77 %B = mul i32 %A, 3 78 %C = shl i32 %B, 1 ;; convert to an mul instruction 79 ret i32 %C 80} 81 82define i32 @test7(i8 %A) { 83; CHECK: @test7 84; CHECK-NEXT: ret i32 -1 85 %shift.upgrd.3 = zext i8 %A to i32 86 %B = ashr i32 -1, %shift.upgrd.3 ;; Always equal to -1 87 ret i32 %B 88} 89 90;; (A << 5) << 3 === A << 8 == 0 91define i8 @test8(i8 %A) { 92; CHECK: @test8 93; CHECK: ret i8 0 94 %B = shl i8 %A, 5 ; <i8> [#uses=1] 95 %C = shl i8 %B, 3 ; <i8> [#uses=1] 96 ret i8 %C 97} 98 99;; (A << 7) >> 7 === A & 1 100define i8 @test9(i8 %A) { 101; CHECK: @test9 102; CHECK-NEXT: and i8 %A, 1 103; CHECK-NEXT: ret i8 104 %B = shl i8 %A, 7 ; <i8> [#uses=1] 105 %C = lshr i8 %B, 7 ; <i8> [#uses=1] 106 ret i8 %C 107} 108 109;; This transformation is deferred to DAGCombine: 110;; (A >> 7) << 7 === A & 128 111;; The shl may be valuable to scalar evolution. 112define i8 @test10(i8 %A) { 113; CHECK: @test10 114; CHECK-NEXT: and i8 %A, -128 115; CHECK-NEXT: ret i8 116 %B = lshr i8 %A, 7 ; <i8> [#uses=1] 117 %C = shl i8 %B, 7 ; <i8> [#uses=1] 118 ret i8 %C 119} 120 121;; Allow the simplification when the lshr shift is exact. 122define i8 @test10a(i8 %A) { 123; CHECK: @test10a 124; CHECK-NEXT: ret i8 %A 125 %B = lshr exact i8 %A, 7 126 %C = shl i8 %B, 7 127 ret i8 %C 128} 129 130;; This transformation is deferred to DAGCombine: 131;; (A >> 3) << 4 === (A & 0x1F) << 1 132;; The shl may be valuable to scalar evolution. 133define i8 @test11(i8 %A) { 134; CHECK: @test11 135; CHECK: shl i8 136; CHECK-NEXT: ret i8 137 %a = mul i8 %A, 3 ; <i8> [#uses=1] 138 %B = lshr i8 %a, 3 ; <i8> [#uses=1] 139 %C = shl i8 %B, 4 ; <i8> [#uses=1] 140 ret i8 %C 141} 142 143;; Allow the simplification in InstCombine when the lshr shift is exact. 144define i8 @test11a(i8 %A) { 145; CHECK: @test11a 146; CHECK-NEXT: mul i8 %A, 6 147; CHECK-NEXT: ret i8 148 %a = mul i8 %A, 3 149 %B = lshr exact i8 %a, 3 150 %C = shl i8 %B, 4 151 ret i8 %C 152} 153 154;; This is deferred to DAGCombine unless %B is single-use. 155;; (A >> 8) << 8 === A & -256 156define i32 @test12(i32 %A) { 157; CHECK: @test12 158; CHECK-NEXT: and i32 %A, -256 159; CHECK-NEXT: ret i32 160 %B = ashr i32 %A, 8 ; <i32> [#uses=1] 161 %C = shl i32 %B, 8 ; <i32> [#uses=1] 162 ret i32 %C 163} 164 165;; This transformation is deferred to DAGCombine: 166;; (A >> 3) << 4 === (A & -8) * 2 167;; The shl may be valuable to scalar evolution. 168define i8 @test13(i8 %A) { 169; CHECK: @test13 170; CHECK: shl i8 171; CHECK-NEXT: ret i8 172 %a = mul i8 %A, 3 ; <i8> [#uses=1] 173 %B = ashr i8 %a, 3 ; <i8> [#uses=1] 174 %C = shl i8 %B, 4 ; <i8> [#uses=1] 175 ret i8 %C 176} 177 178define i8 @test13a(i8 %A) { 179; CHECK: @test13a 180; CHECK-NEXT: mul i8 %A, 6 181; CHECK-NEXT: ret i8 182 %a = mul i8 %A, 3 183 %B = ashr exact i8 %a, 3 184 %C = shl i8 %B, 4 185 ret i8 %C 186} 187 188;; D = ((B | 1234) << 4) === ((B << 4)|(1234 << 4) 189define i32 @test14(i32 %A) { 190; CHECK: @test14 191; CHECK-NEXT: %B = and i32 %A, -19760 192; CHECK-NEXT: or i32 %B, 19744 193; CHECK-NEXT: ret i32 194 %B = lshr i32 %A, 4 ; <i32> [#uses=1] 195 %C = or i32 %B, 1234 ; <i32> [#uses=1] 196 %D = shl i32 %C, 4 ; <i32> [#uses=1] 197 ret i32 %D 198} 199 200;; D = ((B | 1234) << 4) === ((B << 4)|(1234 << 4) 201define i32 @test14a(i32 %A) { 202; CHECK: @test14a 203; CHECK-NEXT: and i32 %A, 77 204; CHECK-NEXT: ret i32 205 %B = shl i32 %A, 4 ; <i32> [#uses=1] 206 %C = and i32 %B, 1234 ; <i32> [#uses=1] 207 %D = lshr i32 %C, 4 ; <i32> [#uses=1] 208 ret i32 %D 209} 210 211define i32 @test15(i1 %C) { 212; CHECK: @test15 213; CHECK-NEXT: select i1 %C, i32 12, i32 4 214; CHECK-NEXT: ret i32 215 %A = select i1 %C, i32 3, i32 1 ; <i32> [#uses=1] 216 %V = shl i32 %A, 2 ; <i32> [#uses=1] 217 ret i32 %V 218} 219 220define i32 @test15a(i1 %C) { 221; CHECK: @test15a 222; CHECK-NEXT: select i1 %C, i32 512, i32 128 223; CHECK-NEXT: ret i32 224 %A = select i1 %C, i8 3, i8 1 ; <i8> [#uses=1] 225 %shift.upgrd.4 = zext i8 %A to i32 ; <i32> [#uses=1] 226 %V = shl i32 64, %shift.upgrd.4 ; <i32> [#uses=1] 227 ret i32 %V 228} 229 230define i1 @test16(i32 %X) { 231; CHECK: @test16 232; CHECK-NEXT: and i32 %X, 16 233; CHECK-NEXT: icmp ne i32 234; CHECK-NEXT: ret i1 235 %tmp.3 = ashr i32 %X, 4 236 %tmp.6 = and i32 %tmp.3, 1 237 %tmp.7 = icmp ne i32 %tmp.6, 0 238 ret i1 %tmp.7 239} 240 241define i1 @test17(i32 %A) { 242; CHECK: @test17 243; CHECK-NEXT: and i32 %A, -8 244; CHECK-NEXT: icmp eq i32 245; CHECK-NEXT: ret i1 246 %B = lshr i32 %A, 3 ; <i32> [#uses=1] 247 %C = icmp eq i32 %B, 1234 ; <i1> [#uses=1] 248 ret i1 %C 249} 250 251 252define i1 @test18(i8 %A) { 253; CHECK: @test18 254; CHECK: ret i1 false 255 256 %B = lshr i8 %A, 7 ; <i8> [#uses=1] 257 ;; false 258 %C = icmp eq i8 %B, 123 ; <i1> [#uses=1] 259 ret i1 %C 260} 261 262define i1 @test19(i32 %A) { 263; CHECK: @test19 264; CHECK-NEXT: icmp ult i32 %A, 4 265; CHECK-NEXT: ret i1 266 %B = ashr i32 %A, 2 ; <i32> [#uses=1] 267 ;; (X & -4) == 0 268 %C = icmp eq i32 %B, 0 ; <i1> [#uses=1] 269 ret i1 %C 270} 271 272 273define i1 @test19a(i32 %A) { 274; CHECK: @test19a 275; CHECK-NEXT: and i32 %A, -4 276; CHECK-NEXT: icmp eq i32 277; CHECK-NEXT: ret i1 278 %B = ashr i32 %A, 2 ; <i32> [#uses=1] 279 ;; (X & -4) == -4 280 %C = icmp eq i32 %B, -1 ; <i1> [#uses=1] 281 ret i1 %C 282} 283 284define i1 @test20(i8 %A) { 285; CHECK: @test20 286; CHECK: ret i1 false 287 %B = ashr i8 %A, 7 ; <i8> [#uses=1] 288 ;; false 289 %C = icmp eq i8 %B, 123 ; <i1> [#uses=1] 290 ret i1 %C 291} 292 293define i1 @test21(i8 %A) { 294; CHECK: @test21 295; CHECK-NEXT: and i8 %A, 15 296; CHECK-NEXT: icmp eq i8 297; CHECK-NEXT: ret i1 298 %B = shl i8 %A, 4 ; <i8> [#uses=1] 299 %C = icmp eq i8 %B, -128 ; <i1> [#uses=1] 300 ret i1 %C 301} 302 303define i1 @test22(i8 %A) { 304; CHECK: @test22 305; CHECK-NEXT: and i8 %A, 15 306; CHECK-NEXT: icmp eq i8 307; CHECK-NEXT: ret i1 308 %B = shl i8 %A, 4 ; <i8> [#uses=1] 309 %C = icmp eq i8 %B, 0 ; <i1> [#uses=1] 310 ret i1 %C 311} 312 313define i8 @test23(i32 %A) { 314; CHECK: @test23 315; CHECK-NEXT: trunc i32 %A to i8 316; CHECK-NEXT: ret i8 317 318 ;; casts not needed 319 %B = shl i32 %A, 24 ; <i32> [#uses=1] 320 %C = ashr i32 %B, 24 ; <i32> [#uses=1] 321 %D = trunc i32 %C to i8 ; <i8> [#uses=1] 322 ret i8 %D 323} 324 325define i8 @test24(i8 %X) { 326; CHECK: @test24 327; CHECK-NEXT: and i8 %X, 3 328; CHECK-NEXT: ret i8 329 %Y = and i8 %X, -5 ; <i8> [#uses=1] 330 %Z = shl i8 %Y, 5 ; <i8> [#uses=1] 331 %Q = ashr i8 %Z, 5 ; <i8> [#uses=1] 332 ret i8 %Q 333} 334 335define i32 @test25(i32 %tmp.2, i32 %AA) { 336; CHECK: @test25 337; CHECK-NEXT: and i32 %tmp.2, -131072 338; CHECK-NEXT: add i32 %{{[^,]*}}, %AA 339; CHECK-NEXT: and i32 %{{[^,]*}}, -131072 340; CHECK-NEXT: ret i32 341 %x = lshr i32 %AA, 17 ; <i32> [#uses=1] 342 %tmp.3 = lshr i32 %tmp.2, 17 ; <i32> [#uses=1] 343 %tmp.5 = add i32 %tmp.3, %x ; <i32> [#uses=1] 344 %tmp.6 = shl i32 %tmp.5, 17 ; <i32> [#uses=1] 345 ret i32 %tmp.6 346} 347 348;; handle casts between shifts. 349define i32 @test26(i32 %A) { 350; CHECK: @test26 351; CHECK-NEXT: and i32 %A, -2 352; CHECK-NEXT: ret i32 353 %B = lshr i32 %A, 1 ; <i32> [#uses=1] 354 %C = bitcast i32 %B to i32 ; <i32> [#uses=1] 355 %D = shl i32 %C, 1 ; <i32> [#uses=1] 356 ret i32 %D 357} 358 359 360define i1 @test27(i32 %x) nounwind { 361; CHECK: @test27 362; CHECK-NEXT: and i32 %x, 8 363; CHECK-NEXT: icmp ne i32 364; CHECK-NEXT: ret i1 365 %y = lshr i32 %x, 3 366 %z = trunc i32 %y to i1 367 ret i1 %z 368} 369 370define i8 @test28(i8 %x) { 371entry: 372; CHECK: @test28 373; CHECK: icmp slt i8 %x, 0 374; CHECK-NEXT: br i1 375 %tmp1 = lshr i8 %x, 7 376 %cond1 = icmp ne i8 %tmp1, 0 377 br i1 %cond1, label %bb1, label %bb2 378 379bb1: 380 ret i8 0 381 382bb2: 383 ret i8 1 384} 385 386define i8 @test28a(i8 %x, i8 %y) { 387entry: 388; This shouldn't be transformed. 389; CHECK: @test28a 390; CHECK: %tmp1 = lshr i8 %x, 7 391; CHECK: %cond1 = icmp eq i8 %tmp1, 0 392; CHECK: br i1 %cond1, label %bb2, label %bb1 393 %tmp1 = lshr i8 %x, 7 394 %cond1 = icmp ne i8 %tmp1, 0 395 br i1 %cond1, label %bb1, label %bb2 396bb1: 397 ret i8 %tmp1 398bb2: 399 %tmp2 = add i8 %tmp1, %y 400 ret i8 %tmp2 401} 402 403 404define i32 @test29(i64 %d18) { 405entry: 406 %tmp916 = lshr i64 %d18, 32 407 %tmp917 = trunc i64 %tmp916 to i32 408 %tmp10 = lshr i32 %tmp917, 31 409 ret i32 %tmp10 410; CHECK: @test29 411; CHECK: %tmp916 = lshr i64 %d18, 63 412; CHECK: %tmp10 = trunc i64 %tmp916 to i32 413} 414 415 416define i32 @test30(i32 %A, i32 %B, i32 %C) { 417 %X = shl i32 %A, %C 418 %Y = shl i32 %B, %C 419 %Z = and i32 %X, %Y 420 ret i32 %Z 421; CHECK: @test30 422; CHECK: %X1 = and i32 %A, %B 423; CHECK: %Z = shl i32 %X1, %C 424} 425 426define i32 @test31(i32 %A, i32 %B, i32 %C) { 427 %X = lshr i32 %A, %C 428 %Y = lshr i32 %B, %C 429 %Z = or i32 %X, %Y 430 ret i32 %Z 431; CHECK: @test31 432; CHECK: %X1 = or i32 %A, %B 433; CHECK: %Z = lshr i32 %X1, %C 434} 435 436define i32 @test32(i32 %A, i32 %B, i32 %C) { 437 %X = ashr i32 %A, %C 438 %Y = ashr i32 %B, %C 439 %Z = xor i32 %X, %Y 440 ret i32 %Z 441; CHECK: @test32 442; CHECK: %X1 = xor i32 %A, %B 443; CHECK: %Z = ashr i32 %X1, %C 444; CHECK: ret i32 %Z 445} 446 447define i1 @test33(i32 %X) { 448 %tmp1 = shl i32 %X, 7 449 %tmp2 = icmp slt i32 %tmp1, 0 450 ret i1 %tmp2 451; CHECK: @test33 452; CHECK: %tmp1.mask = and i32 %X, 16777216 453; CHECK: %tmp2 = icmp ne i32 %tmp1.mask, 0 454} 455 456define i1 @test34(i32 %X) { 457 %tmp1 = lshr i32 %X, 7 458 %tmp2 = icmp slt i32 %tmp1, 0 459 ret i1 %tmp2 460; CHECK: @test34 461; CHECK: ret i1 false 462} 463 464define i1 @test35(i32 %X) { 465 %tmp1 = ashr i32 %X, 7 466 %tmp2 = icmp slt i32 %tmp1, 0 467 ret i1 %tmp2 468; CHECK: @test35 469; CHECK: %tmp2 = icmp slt i32 %X, 0 470; CHECK: ret i1 %tmp2 471} 472 473define i128 @test36(i128 %A, i128 %B) { 474entry: 475 %tmp27 = shl i128 %A, 64 476 %tmp23 = shl i128 %B, 64 477 %ins = or i128 %tmp23, %tmp27 478 %tmp45 = lshr i128 %ins, 64 479 ret i128 %tmp45 480 481; CHECK: @test36 482; CHECK: %tmp231 = or i128 %B, %A 483; CHECK: %ins = and i128 %tmp231, 18446744073709551615 484; CHECK: ret i128 %ins 485} 486 487define i64 @test37(i128 %A, i32 %B) { 488entry: 489 %tmp27 = shl i128 %A, 64 490 %tmp22 = zext i32 %B to i128 491 %tmp23 = shl i128 %tmp22, 96 492 %ins = or i128 %tmp23, %tmp27 493 %tmp45 = lshr i128 %ins, 64 494 %tmp46 = trunc i128 %tmp45 to i64 495 ret i64 %tmp46 496 497; CHECK: @test37 498; CHECK: %tmp23 = shl nuw nsw i128 %tmp22, 32 499; CHECK: %ins = or i128 %tmp23, %A 500; CHECK: %tmp46 = trunc i128 %ins to i64 501} 502 503define i32 @test38(i32 %x) nounwind readnone { 504 %rem = srem i32 %x, 32 505 %shl = shl i32 1, %rem 506 ret i32 %shl 507; CHECK: @test38 508; CHECK-NEXT: and i32 %x, 31 509; CHECK-NEXT: shl i32 1 510; CHECK-NEXT: ret i32 511} 512 513; <rdar://problem/8756731> 514; CHECK: @test39 515define i8 @test39(i32 %a0) { 516entry: 517 %tmp4 = trunc i32 %a0 to i8 518; CHECK: and i8 %tmp49, 64 519 %tmp5 = shl i8 %tmp4, 5 520 %tmp48 = and i8 %tmp5, 32 521 %tmp49 = lshr i8 %tmp48, 5 522 %tmp50 = mul i8 %tmp49, 64 523 %tmp51 = xor i8 %tmp50, %tmp5 524 %tmp52 = and i8 %tmp51, -128 525 %tmp53 = lshr i8 %tmp52, 7 526; CHECK: lshr i8 %tmp51, 7 527 %tmp54 = mul i8 %tmp53, 16 528; CHECK: shl nuw nsw i8 %tmp53, 4 529 %tmp55 = xor i8 %tmp54, %tmp51 530; CHECK: ret i8 %tmp551 531 ret i8 %tmp55 532} 533 534; PR9809 535define i32 @test40(i32 %a, i32 %b) nounwind { 536 %shl1 = shl i32 1, %b 537 %shl2 = shl i32 %shl1, 2 538 %div = udiv i32 %a, %shl2 539 ret i32 %div 540; CHECK: @test40 541; CHECK-NEXT: add i32 %b, 2 542; CHECK-NEXT: lshr i32 %a 543; CHECK-NEXT: ret i32 544} 545 546define i32 @test41(i32 %a, i32 %b) nounwind { 547 %1 = shl i32 1, %b 548 %2 = shl i32 %1, 3 549 ret i32 %2 550; CHECK: @test41 551; CHECK-NEXT: shl i32 8, %b 552; CHECK-NEXT: ret i32 553} 554 555define i32 @test42(i32 %a, i32 %b) nounwind { 556 %div = lshr i32 4096, %b ; must be exact otherwise we'd divide by zero 557 %div2 = udiv i32 %a, %div 558 ret i32 %div2 559; CHECK: @test42 560; CHECK-NEXT: lshr exact i32 4096, %b 561} 562 563define i32 @test43(i32 %a, i32 %b) nounwind { 564 %div = shl i32 4096, %b ; must be exact otherwise we'd divide by zero 565 %div2 = udiv i32 %a, %div 566 ret i32 %div2 567; CHECK: @test43 568; CHECK-NEXT: add i32 %b, 12 569; CHECK-NEXT: lshr 570; CHECK-NEXT: ret 571} 572 573define i32 @test44(i32 %a) nounwind { 574 %y = shl nuw i32 %a, 1 575 %z = shl i32 %y, 4 576 ret i32 %z 577; CHECK: @test44 578; CHECK-NEXT: %y = shl i32 %a, 5 579; CHECK-NEXT: ret i32 %y 580} 581 582define i32 @test45(i32 %a) nounwind { 583 %y = lshr exact i32 %a, 1 584 %z = lshr i32 %y, 4 585 ret i32 %z 586; CHECK: @test45 587; CHECK-NEXT: %y = lshr i32 %a, 5 588; CHECK-NEXT: ret i32 %y 589} 590 591define i32 @test46(i32 %a) { 592 %y = ashr exact i32 %a, 3 593 %z = shl i32 %y, 1 594 ret i32 %z 595; CHECK: @test46 596; CHECK-NEXT: %z = ashr exact i32 %a, 2 597; CHECK-NEXT: ret i32 %z 598} 599 600define i32 @test47(i32 %a) { 601 %y = lshr exact i32 %a, 3 602 %z = shl i32 %y, 1 603 ret i32 %z 604; CHECK: @test47 605; CHECK-NEXT: %z = lshr exact i32 %a, 2 606; CHECK-NEXT: ret i32 %z 607} 608 609define i32 @test48(i32 %x) { 610 %A = lshr exact i32 %x, 1 611 %B = shl i32 %A, 3 612 ret i32 %B 613; CHECK: @test48 614; CHECK-NEXT: %B = shl i32 %x, 2 615; CHECK-NEXT: ret i32 %B 616} 617 618define i32 @test49(i32 %x) { 619 %A = ashr exact i32 %x, 1 620 %B = shl i32 %A, 3 621 ret i32 %B 622; CHECK: @test49 623; CHECK-NEXT: %B = shl i32 %x, 2 624; CHECK-NEXT: ret i32 %B 625} 626 627define i32 @test50(i32 %x) { 628 %A = shl nsw i32 %x, 1 629 %B = ashr i32 %A, 3 630 ret i32 %B 631; CHECK: @test50 632; CHECK-NEXT: %B = ashr i32 %x, 2 633; CHECK-NEXT: ret i32 %B 634} 635 636define i32 @test51(i32 %x) { 637 %A = shl nuw i32 %x, 1 638 %B = lshr i32 %A, 3 639 ret i32 %B 640; CHECK: @test51 641; CHECK-NEXT: %B = lshr i32 %x, 2 642; CHECK-NEXT: ret i32 %B 643} 644 645define i32 @test52(i32 %x) { 646 %A = shl nsw i32 %x, 3 647 %B = ashr i32 %A, 1 648 ret i32 %B 649; CHECK: @test52 650; CHECK-NEXT: %B = shl nsw i32 %x, 2 651; CHECK-NEXT: ret i32 %B 652} 653 654define i32 @test53(i32 %x) { 655 %A = shl nuw i32 %x, 3 656 %B = lshr i32 %A, 1 657 ret i32 %B 658; CHECK: @test53 659; CHECK-NEXT: %B = shl nuw i32 %x, 2 660; CHECK-NEXT: ret i32 %B 661} 662