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1 /*
2  * Copyright@ Samsung Electronics Co. LTD
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #ifndef __S5P_TVOUT_H__
18 #define __S5P_TVOUT_H__
19 
20 #include <linux/fb.h>
21 
22 #include "videodev2.h"
23 #include "videodev2_exynos_media.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
29 /*******************************************
30  * Define
31  *******************************************/
32 /* TVOUT control */
33 #define PFX_NODE_FB               "/dev/graphics/fb"
34 
35 #define PFX_NODE_MEDIADEV         "/dev/media"
36 #define PFX_NODE_SUBDEV           "/dev/v4l-subdev"
37 #define PFX_NODE_VIDEODEV         "/dev/video"
38 #define PFX_ENTITY_SUBDEV_MIXER   "s5p-mixer%d"
39 #define PFX_ENTITY_VIDEODEV_MIXER_GRP "mxr%d_graph%d"
40 #define PFX_ENTITY_SUBDEV_GSC_OUT     "exynos-gsc-sd.%d"
41 #define PFX_ENTITY_VIDEODEV_GSC_OUT   "exynos-gsc.%d.output"
42 
43 #define PFX_ENTITY_SUBDEV_FIMD        "s5p-fimd%d"
44 #define PFX_ENTITY_SUBDEV_GSC_CAP     "gsc-cap-subdev.%d"
45 #define PFX_ENTITY_VIDEODEV_GSC_CAP   "exynos-gsc.%d.capture"
46 
47 /* Sub-Mixer 0 */
48 #define TVOUT0_DEV_G0      "/dev/video16"
49 #define TVOUT0_DEV_G1      "/dev/video17"
50 /* Sub-Mixer 1 */
51 #define TVOUT1_DEV_G0      "/dev/video18"
52 #define TVOUT1_DEV_G1      "/dev/video19"
53 
54 #define MIXER_V_SUBDEV_PAD_SINK     (0)
55 #define MIXER_V_SUBDEV_PAD_SOURCE   (3)
56 #define MIXER_G0_SUBDEV_PAD_SINK    (1)
57 #define MIXER_G0_SUBDEV_PAD_SOURCE  (4)
58 #define MIXER_G1_SUBDEV_PAD_SINK    (2)
59 #define MIXER_G1_SUBDEV_PAD_SOURCE  (5)
60 
61 #define GSCALER_SUBDEV_PAD_SINK     (0)
62 #define GSCALER_SUBDEV_PAD_SOURCE   (1)
63 #define FIMD_SUBDEV_PAD_SOURCE      (0)
64 
65 #define HPD_DEV         "/dev/HPD"
66 
67 /* ------------- Output -----------------*/
68 /* type */
69 #define V4L2_OUTPUT_TYPE_MSDMA          4
70 #define V4L2_OUTPUT_TYPE_COMPOSITE      5
71 #define V4L2_OUTPUT_TYPE_SVIDEO         6
72 #define V4L2_OUTPUT_TYPE_YPBPR_INERLACED    7
73 #define V4L2_OUTPUT_TYPE_YPBPR_PROGRESSIVE  8
74 #define V4L2_OUTPUT_TYPE_RGB_PROGRESSIVE    9
75 #define V4L2_OUTPUT_TYPE_DIGITAL        10
76 #define V4L2_OUTPUT_TYPE_HDMI           V4L2_OUTPUT_TYPE_DIGITAL
77 #define V4L2_OUTPUT_TYPE_HDMI_RGB       11
78 #define V4L2_OUTPUT_TYPE_DVI            12
79 
80 /* ------------- STD -------------------*/
81 #define V4L2_STD_PAL_BDGHI\
82  (V4L2_STD_PAL_B|V4L2_STD_PAL_D|V4L2_STD_PAL_G|V4L2_STD_PAL_H|V4L2_STD_PAL_I)
83 
84 #define V4L2_STD_480P_60_16_9           ((v4l2_std_id)0x04000000)
85 #define V4L2_STD_480P_60_4_3            ((v4l2_std_id)0x05000000)
86 #define V4L2_STD_576P_50_16_9           ((v4l2_std_id)0x06000000)
87 #define V4L2_STD_576P_50_4_3            ((v4l2_std_id)0x07000000)
88 #define V4L2_STD_720P_60                ((v4l2_std_id)0x08000000)
89 #define V4L2_STD_720P_50                ((v4l2_std_id)0x09000000)
90 #define V4L2_STD_1080P_60               ((v4l2_std_id)0x0a000000)
91 #define V4L2_STD_1080P_50               ((v4l2_std_id)0x0b000000)
92 #define V4L2_STD_1080I_60               ((v4l2_std_id)0x0c000000)
93 #define V4L2_STD_1080I_50               ((v4l2_std_id)0x0d000000)
94 #define V4L2_STD_480P_59                ((v4l2_std_id)0x0e000000)
95 #define V4L2_STD_720P_59                ((v4l2_std_id)0x0f000000)
96 #define V4L2_STD_1080I_59               ((v4l2_std_id)0x10000000)
97 #define V4L2_STD_1080P_59               ((v4l2_std_id)0x11000000)
98 #define V4L2_STD_1080P_30               ((v4l2_std_id)0x12000000)
99 #define V4L2_STD_TVOUT_720P_60_SBS_HALF ((v4l2_std_id)0x13000000)
100 #define V4L2_STD_TVOUT_720P_59_SBS_HALF ((v4l2_std_id)0x14000000)
101 #define V4L2_STD_TVOUT_720P_50_TB       ((v4l2_std_id)0x15000000)
102 #define V4L2_STD_TVOUT_1080P_24_TB      ((v4l2_std_id)0x16000000)
103 #define V4L2_STD_TVOUT_1080P_23_TB      ((v4l2_std_id)0x17000000)
104 #define V4L2_STD_TVOUT_1080P_60_SBS_HALF ((v4l2_std_id)0x18000000)
105 
106 /* ------------- Input ------------------*/
107 /* type */
108 #define V4L2_INPUT_TYPE_MSDMA           3
109 #define V4L2_INPUT_TYPE_FIFO            4
110 
111 /*******************************************
112  * structures
113  *******************************************/
114 
115 /* TVOUT */
116 struct v4l2_vid_overlay_src {
117     void            *base_y;
118     void            *base_c;
119     struct v4l2_pix_format  pix_fmt;
120 };
121 
122 struct v4l2_window_s5p_tvout {
123     __u32       capability;
124     __u32       flags;
125     __u32       priority;
126     struct v4l2_window  win;
127 };
128 
129 struct v4l2_pix_format_s5p_tvout {
130     void *base_y;
131     void *base_c;
132     __u32 src_img_endian;
133     struct v4l2_pix_format  pix_fmt;
134 };
135 
136 struct vid_overlay_param {
137     struct v4l2_vid_overlay_src     src;
138     struct v4l2_rect                src_crop;
139     struct v4l2_framebuffer         dst;
140     struct v4l2_window              dst_win;
141 };
142 
143 struct tvout_param {
144     struct v4l2_pix_format_s5p_tvout    tvout_src;
145     struct v4l2_window_s5p_tvout        tvout_rect;
146     struct v4l2_rect                    tvout_dst;
147 };
148 
149 struct overlay_param {
150     struct v4l2_framebuffer         overlay_frame;
151     struct v4l2_window_s5p_tvout    overlay_rect;
152     struct v4l2_rect                overlay_dst;
153 };
154 
155 /* FB */
156 struct s5ptvfb_user_window {
157     int x;
158     int y;
159 };
160 
161 struct s5ptvfb_user_plane_alpha {
162     int channel;
163     unsigned char alpha;
164 };
165 
166 struct s5ptvfb_user_chroma {
167     int enabled;
168     unsigned char red;
169     unsigned char green;
170     unsigned char blue;
171 };
172 
173 enum s5ptvfb_ver_scaling_t {
174     VERTICAL_X1,
175     VERTICAL_X2,
176 };
177 
178 enum s5ptvfb_hor_scaling_t {
179     HORIZONTAL_X1,
180     HORIZONTAL_X2,
181 };
182 
183 struct s5ptvfb_user_scaling {
184     enum s5ptvfb_ver_scaling_t ver;
185     enum s5ptvfb_hor_scaling_t hor;
186 };
187 
188 /*******************************************
189  * custom ioctls
190  *******************************************/
191 
192 #define VIDIOC_S_BASEADDR        _IOR('V', 83, int)
193 
194 #define VIDIOC_HDCP_ENABLE _IOWR('V', 100, unsigned int)
195 #define VIDIOC_HDCP_STATUS _IOR('V', 101, unsigned int)
196 #define VIDIOC_HDCP_PROT_STATUS _IOR('V', 102, unsigned int)
197 
198 #define VIDIOC_INIT_AUDIO _IOR('V', 103, unsigned int)
199 #define VIDIOC_AV_MUTE _IOR('V', 104, unsigned int)
200 #define VIDIOC_G_AVMUTE _IOR('V', 105, unsigned int)
201 #define HPD_GET_STATE _IOR('H', 100, unsigned int)
202 
203 #define S5PTVFB_WIN_POSITION _IOW('F', 213, struct s5ptvfb_user_window)
204 #define S5PTVFB_WIN_SET_PLANE_ALPHA _IOW('F', 214, struct s5ptvfb_user_plane_alpha)
205 #define S5PTVFB_WIN_SET_CHROMA _IOW('F', 215, struct s5ptvfb_user_chroma)
206 
207 #define S5PTVFB_SET_VSYNC_INT _IOW('F', 216, unsigned int)
208 #define S5PTVFB_WAITFORVSYNC _IO('F', 32)
209 #define S5PTVFB_WIN_SET_ADDR _IOW('F', 219, unsigned int)
210 #define S5PTVFB_SET_WIN_ON _IOW('F', 220, unsigned int)
211 #define S5PTVFB_SET_WIN_OFF _IOW('F', 221, unsigned int)
212 #define S5PTVFB_SCALING _IOW('F', 222, struct s5ptvfb_user_scaling)
213 
214 #ifdef __cplusplus
215 }
216 #endif
217 
218 #endif /* __S5P_TVOUT_H__ */
219