Lines Matching refs:RegsToPass
1316 RegsToPassVector &RegsToPass, in PassF64ArgInRegs() argument
1324 RegsToPass.push_back(std::make_pair(VA.getLocReg(), fmrrd)); in PassF64ArgInRegs()
1327 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), fmrrd.getValue(1))); in PassF64ArgInRegs()
1398 RegsToPassVector RegsToPass; in LowerCall() local
1437 PassF64ArgInRegs(dl, DAG, Chain, Op0, RegsToPass, in LowerCall()
1442 PassF64ArgInRegs(dl, DAG, Chain, Op1, RegsToPass, in LowerCall()
1451 PassF64ArgInRegs(dl, DAG, Chain, Arg, RegsToPass, VA, ArgLocs[++i], in LowerCall()
1455 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
1472 RegsToPass.push_back(std::make_pair(j, Load)); in LowerCall()
1512 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
1513 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
1514 RegsToPass[i].second, InFlag); in LowerCall()
1529 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
1530 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
1531 RegsToPass[i].second, InFlag); in LowerCall()
1670 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
1671 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
1672 RegsToPass[i].second.getValueType())); in LowerCall()