Lines Matching refs:cop
4321 def CDP : ABI<0b1110, (outs), (ins p_imm:$cop, imm0_15:$opc1,
4323 NoItinerary, "cdp", "\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
4324 [(int_arm_cdp imm:$cop, imm:$opc1, imm:$CRd, imm:$CRn,
4329 bits<4> cop;
4336 let Inst{11-8} = cop;
4342 def CDP2 : ABXI<0b1110, (outs), (ins pf_imm:$cop, imm0_15:$opc1,
4344 NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
4345 [(int_arm_cdp2 imm:$cop, imm:$opc1, imm:$CRd, imm:$CRn,
4351 bits<4> cop;
4358 let Inst{11-8} = cop;
4378 def _OFFSET : ACI<(outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr),
4379 asm, "\t$cop, $CRd, $addr"> {
4381 bits<4> cop;
4390 let Inst{11-8} = cop;
4394 def _PRE : ACI<(outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr),
4395 asm, "\t$cop, $CRd, $addr!", IndexModePre> {
4397 bits<4> cop;
4406 let Inst{11-8} = cop;
4410 def _POST: ACI<(outs), (ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$addr,
4412 asm, "\t$cop, $CRd, $addr, $offset", IndexModePost> {
4415 bits<4> cop;
4424 let Inst{11-8} = cop;
4429 (ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$addr,
4431 asm, "\t$cop, $CRd, $addr, $option"> {
4434 bits<4> cop;
4443 let Inst{11-8} = cop;
4449 def _OFFSET : ACInoP<(outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr),
4450 asm, "\t$cop, $CRd, $addr"> {
4452 bits<4> cop;
4461 let Inst{11-8} = cop;
4465 def _PRE : ACInoP<(outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr),
4466 asm, "\t$cop, $CRd, $addr!", IndexModePre> {
4468 bits<4> cop;
4477 let Inst{11-8} = cop;
4481 def _POST: ACInoP<(outs), (ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$addr,
4483 asm, "\t$cop, $CRd, $addr, $offset", IndexModePost> {
4486 bits<4> cop;
4495 let Inst{11-8} = cop;
4500 (ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$addr,
4502 asm, "\t$cop, $CRd, $addr, $option"> {
4505 bits<4> cop;
4514 let Inst{11-8} = cop;
4536 "\t$cop, $opc1, $Rt, $CRn, $CRm, $opc2", pattern> {
4541 bits<4> cop;
4548 let Inst{11-8} = cop;
4557 (ins p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
4559 [(int_arm_mcr imm:$cop, imm:$opc1, GPR:$Rt, imm:$CRn,
4561 def : ARMInstAlias<"mcr${p} $cop, $opc1, $Rt, $CRn, $CRm",
4562 (MCR p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
4566 (ins p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm,
4568 def : ARMInstAlias<"mrc${p} $cop, $opc1, $Rt, $CRn, $CRm",
4569 (MRC GPR:$Rt, p_imm:$cop, imm0_7:$opc1, c_imm:$CRn,
4572 def : ARMPat<(int_arm_mrc imm:$cop, imm:$opc1, imm:$CRn, imm:$CRm, imm:$opc2),
4573 (MRC imm:$cop, imm:$opc1, imm:$CRn, imm:$CRm, imm:$opc2)>;
4578 !strconcat(opc, "\t$cop, $opc1, $Rt, $CRn, $CRm, $opc2"), pattern> {
4584 bits<4> cop;
4591 let Inst{11-8} = cop;
4600 (ins p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
4602 [(int_arm_mcr2 imm:$cop, imm:$opc1, GPR:$Rt, imm:$CRn,
4604 def : ARMInstAlias<"mcr2$ $cop, $opc1, $Rt, $CRn, $CRm",
4605 (MCR2 p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
4609 (ins p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm,
4611 def : ARMInstAlias<"mrc2$ $cop, $opc1, $Rt, $CRn, $CRm",
4612 (MRC2 GPR:$Rt, p_imm:$cop, imm0_7:$opc1, c_imm:$CRn,
4615 def : ARMV5TPat<(int_arm_mrc2 imm:$cop, imm:$opc1, imm:$CRn,
4617 (MRC2 imm:$cop, imm:$opc1, imm:$CRn, imm:$CRm, imm:$opc2)>;
4620 : ABI<0b1100, (outs), (ins p_imm:$cop, imm0_15:$opc1,
4622 NoItinerary, opc, "\t$cop, $opc1, $Rt, $Rt2, $CRm", pattern> {
4628 bits<4> cop;
4634 let Inst{11-8} = cop;
4640 [(int_arm_mcrr imm:$cop, imm:$opc1, GPRnopc:$Rt,
4645 : ABXI<0b1100, (outs), (ins p_imm:$cop, imm0_15:$opc1,
4647 !strconcat(opc, "\t$cop, $opc1, $Rt, $Rt2, $CRm"), pattern> {
4654 bits<4> cop;
4660 let Inst{11-8} = cop;
4668 [(int_arm_mcrr2 imm:$cop, imm:$opc1, GPRnopc:$Rt,