Lines Matching refs:ISD
38 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_SRet()
51 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_f64()
82 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
147 const SmallVectorImpl<ISD::InputArg> in LowerFormalArguments()
203 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal); in LowerFormalArguments()
204 WholeValue = DAG.getNode(ISD::BITCAST, dl, MVT::f64, WholeValue); in LowerFormalArguments()
212 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Arg); in LowerFormalArguments()
214 Arg = DAG.getNode(ISD::AssertSext, dl, MVT::i32, Arg, in LowerFormalArguments()
216 Arg = DAG.getNode(ISD::TRUNCATE, dl, VA.getLocVT(), Arg); in LowerFormalArguments()
258 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal); in LowerFormalArguments()
259 WholeValue = DAG.getNode(ISD::BITCAST, dl, MVT::f64, WholeValue); in LowerFormalArguments()
274 ISD::LoadExtType LoadOp = ISD::SEXTLOAD; in LowerFormalArguments()
277 FIPtr = DAG.getNode(ISD::ADD, dl, MVT::i32, FIPtr, in LowerFormalArguments()
282 Load = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), Load); in LowerFormalArguments()
296 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Copy, Chain); in LowerFormalArguments()
336 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, in LowerFormalArguments()
349 SmallVector<ISD::OutputArg, 32> &Outs = CLI.Outs; in LowerCall()
351 SmallVector<ISD::InputArg, 32> &Ins = CLI.Ins; in LowerCall()
378 ISD::ArgFlagsTy Flags = Outs[i].Flags; in LowerCall()
411 ISD::ArgFlagsTy Flags = Outs[realArgIdx].Flags; in LowerCall()
422 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
425 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
428 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
431 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
440 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall()
457 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall()
473 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, in LowerCall()
490 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall()
500 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall()
506 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall()
521 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Arg); in LowerCall()
531 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall()
540 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, in LowerCall()
646 static SPCC::CondCodes IntCondCCodeToICC(ISD::CondCode CC) { in IntCondCCodeToICC()
649 case ISD::SETEQ: return SPCC::ICC_E; in IntCondCCodeToICC()
650 case ISD::SETNE: return SPCC::ICC_NE; in IntCondCCodeToICC()
651 case ISD::SETLT: return SPCC::ICC_L; in IntCondCCodeToICC()
652 case ISD::SETGT: return SPCC::ICC_G; in IntCondCCodeToICC()
653 case ISD::SETLE: return SPCC::ICC_LE; in IntCondCCodeToICC()
654 case ISD::SETGE: return SPCC::ICC_GE; in IntCondCCodeToICC()
655 case ISD::SETULT: return SPCC::ICC_CS; in IntCondCCodeToICC()
656 case ISD::SETULE: return SPCC::ICC_LEU; in IntCondCCodeToICC()
657 case ISD::SETUGT: return SPCC::ICC_GU; in IntCondCCodeToICC()
658 case ISD::SETUGE: return SPCC::ICC_CC; in IntCondCCodeToICC()
664 static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondCode CC) { in FPCondCCodeToFCC()
667 case ISD::SETEQ: in FPCondCCodeToFCC()
668 case ISD::SETOEQ: return SPCC::FCC_E; in FPCondCCodeToFCC()
669 case ISD::SETNE: in FPCondCCodeToFCC()
670 case ISD::SETUNE: return SPCC::FCC_NE; in FPCondCCodeToFCC()
671 case ISD::SETLT: in FPCondCCodeToFCC()
672 case ISD::SETOLT: return SPCC::FCC_L; in FPCondCCodeToFCC()
673 case ISD::SETGT: in FPCondCCodeToFCC()
674 case ISD::SETOGT: return SPCC::FCC_G; in FPCondCCodeToFCC()
675 case ISD::SETLE: in FPCondCCodeToFCC()
676 case ISD::SETOLE: return SPCC::FCC_LE; in FPCondCCodeToFCC()
677 case ISD::SETGE: in FPCondCCodeToFCC()
678 case ISD::SETOGE: return SPCC::FCC_GE; in FPCondCCodeToFCC()
679 case ISD::SETULT: return SPCC::FCC_UL; in FPCondCCodeToFCC()
680 case ISD::SETULE: return SPCC::FCC_ULE; in FPCondCCodeToFCC()
681 case ISD::SETUGT: return SPCC::FCC_UG; in FPCondCCodeToFCC()
682 case ISD::SETUGE: return SPCC::FCC_UGE; in FPCondCCodeToFCC()
683 case ISD::SETUO: return SPCC::FCC_U; in FPCondCCodeToFCC()
684 case ISD::SETO: return SPCC::FCC_O; in FPCondCCodeToFCC()
685 case ISD::SETONE: return SPCC::FCC_LG; in FPCondCCodeToFCC()
686 case ISD::SETUEQ: return SPCC::FCC_UE; in FPCondCCodeToFCC()
699 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand); in SparcTargetLowering()
701 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote); in SparcTargetLowering()
706 setOperationAction(ISD::GlobalAddress, MVT::i32, Custom); in SparcTargetLowering()
707 setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom); in SparcTargetLowering()
708 setOperationAction(ISD::ConstantPool , MVT::i32, Custom); in SparcTargetLowering()
711 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand); in SparcTargetLowering()
712 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Expand); in SparcTargetLowering()
713 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand); in SparcTargetLowering()
716 setOperationAction(ISD::UREM, MVT::i32, Expand); in SparcTargetLowering()
717 setOperationAction(ISD::SREM, MVT::i32, Expand); in SparcTargetLowering()
718 setOperationAction(ISD::SDIVREM, MVT::i32, Expand); in SparcTargetLowering()
719 setOperationAction(ISD::UDIVREM, MVT::i32, Expand); in SparcTargetLowering()
722 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); in SparcTargetLowering()
723 setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom); in SparcTargetLowering()
726 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in SparcTargetLowering()
727 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); in SparcTargetLowering()
729 setOperationAction(ISD::BITCAST, MVT::f32, Expand); in SparcTargetLowering()
730 setOperationAction(ISD::BITCAST, MVT::i32, Expand); in SparcTargetLowering()
733 setOperationAction(ISD::SELECT, MVT::i32, Expand); in SparcTargetLowering()
734 setOperationAction(ISD::SELECT, MVT::f32, Expand); in SparcTargetLowering()
735 setOperationAction(ISD::SELECT, MVT::f64, Expand); in SparcTargetLowering()
736 setOperationAction(ISD::SETCC, MVT::i32, Expand); in SparcTargetLowering()
737 setOperationAction(ISD::SETCC, MVT::f32, Expand); in SparcTargetLowering()
738 setOperationAction(ISD::SETCC, MVT::f64, Expand); in SparcTargetLowering()
741 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in SparcTargetLowering()
742 setOperationAction(ISD::BRIND, MVT::Other, Expand); in SparcTargetLowering()
743 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in SparcTargetLowering()
744 setOperationAction(ISD::BR_CC, MVT::i32, Custom); in SparcTargetLowering()
745 setOperationAction(ISD::BR_CC, MVT::f32, Custom); in SparcTargetLowering()
746 setOperationAction(ISD::BR_CC, MVT::f64, Custom); in SparcTargetLowering()
748 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in SparcTargetLowering()
749 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); in SparcTargetLowering()
750 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom); in SparcTargetLowering()
754 setOperationAction(ISD::MEMBARRIER, MVT::Other, Expand); in SparcTargetLowering()
755 setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Expand); in SparcTargetLowering()
757 setOperationAction(ISD::FSIN , MVT::f64, Expand); in SparcTargetLowering()
758 setOperationAction(ISD::FCOS , MVT::f64, Expand); in SparcTargetLowering()
759 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in SparcTargetLowering()
760 setOperationAction(ISD::FREM , MVT::f64, Expand); in SparcTargetLowering()
761 setOperationAction(ISD::FMA , MVT::f64, Expand); in SparcTargetLowering()
762 setOperationAction(ISD::FSIN , MVT::f32, Expand); in SparcTargetLowering()
763 setOperationAction(ISD::FCOS , MVT::f32, Expand); in SparcTargetLowering()
764 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in SparcTargetLowering()
765 setOperationAction(ISD::FREM , MVT::f32, Expand); in SparcTargetLowering()
766 setOperationAction(ISD::FMA , MVT::f32, Expand); in SparcTargetLowering()
767 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in SparcTargetLowering()
768 setOperationAction(ISD::CTTZ , MVT::i32, Expand); in SparcTargetLowering()
769 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); in SparcTargetLowering()
770 setOperationAction(ISD::CTLZ , MVT::i32, Expand); in SparcTargetLowering()
771 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Expand); in SparcTargetLowering()
772 setOperationAction(ISD::ROTL , MVT::i32, Expand); in SparcTargetLowering()
773 setOperationAction(ISD::ROTR , MVT::i32, Expand); in SparcTargetLowering()
774 setOperationAction(ISD::BSWAP, MVT::i32, Expand); in SparcTargetLowering()
775 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in SparcTargetLowering()
776 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in SparcTargetLowering()
777 setOperationAction(ISD::FPOW , MVT::f64, Expand); in SparcTargetLowering()
778 setOperationAction(ISD::FPOW , MVT::f32, Expand); in SparcTargetLowering()
780 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); in SparcTargetLowering()
781 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); in SparcTargetLowering()
782 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); in SparcTargetLowering()
785 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); in SparcTargetLowering()
786 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in SparcTargetLowering()
788 setOperationAction(ISD::EH_LABEL, MVT::Other, Expand); in SparcTargetLowering()
791 setOperationAction(ISD::VASTART , MVT::Other, Custom); in SparcTargetLowering()
793 setOperationAction(ISD::VAARG , MVT::Other, Custom); in SparcTargetLowering()
796 setOperationAction(ISD::VACOPY , MVT::Other, Expand); in SparcTargetLowering()
797 setOperationAction(ISD::VAEND , MVT::Other, Expand); in SparcTargetLowering()
798 setOperationAction(ISD::STACKSAVE , MVT::Other, Expand); in SparcTargetLowering()
799 setOperationAction(ISD::STACKRESTORE , MVT::Other, Expand); in SparcTargetLowering()
800 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Custom); in SparcTargetLowering()
803 setOperationAction(ISD::EH_LABEL, MVT::Other, Expand); in SparcTargetLowering()
808 setOperationAction(ISD::CTPOP, MVT::i32, Legal); in SparcTargetLowering()
865 ISD::CondCode CC, unsigned &SPCC) { in LookThroughSetCC()
868 CC == ISD::SETNE && in LookThroughSetCC()
894 return DAG.getNode(ISD::ADD, dl, MVT::i32, Lo, Hi); in LowerGlobalAddress()
898 SDValue RelAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, Lo, Hi); in LowerGlobalAddress()
899 SDValue AbsAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, in LowerGlobalAddress()
915 return DAG.getNode(ISD::ADD, dl, MVT::i32, Lo, Hi); in LowerConstantPool()
919 SDValue RelAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, Lo, Hi); in LowerConstantPool()
920 SDValue AbsAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, in LowerConstantPool()
931 return DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op); in LowerFP_TO_SINT()
937 SDValue Tmp = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Op.getOperand(0)); in LowerSINT_TO_FP()
944 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get(); in LowerBR_CC()
975 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get(); in LowerSELECT_CC()
1011 DAG.getNode(ISD::ADD, dl, MVT::i32, in LowerVASTART()
1030 SDValue NextPtr = DAG.getNode(ISD::ADD, dl, MVT::i32, VAList, in LowerVAARG()
1048 DAG.getNode(ISD::BITCAST, dl, MVT::f64, V), in LowerVAARG()
1061 SDValue NewSP = DAG.getNode(ISD::SUB, dl, MVT::i32, SP, Size); // Value in LowerDYNAMIC_STACKALLOC()
1066 SDValue NewVal = DAG.getNode(ISD::ADD, dl, MVT::i32, NewSP, in LowerDYNAMIC_STACKALLOC()
1099 SDValue Ptr = DAG.getNode(ISD::ADD, in LowerFRAMEADDR()
1130 SDValue Ptr = DAG.getNode(ISD::ADD, in LowerRETURNADDR()
1147 case ISD::RETURNADDR: return LowerRETURNADDR(Op, DAG); in LowerOperation()
1148 case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG); in LowerOperation()
1149 case ISD::GlobalTLSAddress: in LowerOperation()
1151 case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); in LowerOperation()
1152 case ISD::ConstantPool: return LowerConstantPool(Op, DAG); in LowerOperation()
1153 case ISD::FP_TO_SINT: return LowerFP_TO_SINT(Op, DAG); in LowerOperation()
1154 case ISD::SINT_TO_FP: return LowerSINT_TO_FP(Op, DAG); in LowerOperation()
1155 case ISD::BR_CC: return LowerBR_CC(Op, DAG); in LowerOperation()
1156 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); in LowerOperation()
1157 case ISD::VASTART: return LowerVASTART(Op, DAG, *this); in LowerOperation()
1158 case ISD::VAARG: return LowerVAARG(Op, DAG); in LowerOperation()
1159 case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG); in LowerOperation()