/external/llvm/lib/Target/R600/ |
D | R600ExpandSpecialInstrs.cpp | 113 unsigned DstReg; in runOnMachineFunction() local 142 unsigned DstReg; in runOnMachineFunction() local 170 unsigned DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local 220 unsigned DstReg = MI.getOperand( in runOnMachineFunction() local
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D | AMDGPUIndirectAddressing.cpp | 104 unsigned DstReg = MRI.createVirtualRegister(IndirectStoreRegClass); in runOnMachineFunction() local 119 unsigned DstReg = MRI.createVirtualRegister(IndirectStoreRegClass); in runOnMachineFunction() local
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D | SIInstrInfo.cpp | 151 MachineInstr * SIInstrInfo::getMovImmInstr(MachineFunction *MF, unsigned DstReg, in getMovImmInstr()
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D | R600InstrInfo.cpp | 76 unsigned DstReg, int64_t Imm) const { in getMovImmInstr() 652 unsigned DstReg, in buildDefaultInstruction() 691 unsigned DstReg, in buildMovImm()
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D | AMDGPUInstrInfo.cpp | 38 unsigned &SrcReg, unsigned &DstReg, in isCoalescableExtInstr()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonPeephole.cpp | 133 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() local 157 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() local 169 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() local 192 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() local
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D | HexagonExpandPredSpillCode.cpp | 124 int DstReg = MI->getOperand(0).getReg(); in runOnMachineFunction() local
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/external/llvm/lib/CodeGen/ |
D | OptimizePHIs.cpp | 87 unsigned DstReg = MI->getOperand(0).getReg(); in IsSingleValuePHICycle() local 130 unsigned DstReg = MI->getOperand(0).getReg(); in IsDeadPHICycle() local
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D | TwoAddressInstructionPass.cpp | 333 unsigned &SrcReg, unsigned &DstReg, in isCopyToReg() 417 unsigned SrcReg, DstReg; in isKilled() local 428 static bool isTwoAddrUse(MachineInstr &MI, unsigned Reg, unsigned &DstReg) { in isTwoAddrUse() 452 unsigned &DstReg, bool &IsDstPhys) { in findOnlyInterestingUse() 658 TwoAddressInstructionPass::scanUses(unsigned DstReg) { in scanUses() 719 unsigned SrcReg, DstReg; in processCopy() local 781 unsigned DstReg; in rescheduleMIBelowKill() local 970 unsigned DstReg; in rescheduleKillAboveMI() local 1308 unsigned DstReg = DstMO.getReg(); in collectTiedOperands() local 1544 unsigned DstReg = mi->getOperand(DstIdx).getReg(); in runOnMachineFunction() local [all …]
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D | RegisterCoalescer.h | 33 unsigned DstReg; variable
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D | ExpandPostRAPseudos.cpp | 85 unsigned DstReg = MI->getOperand(0).getReg(); in LowerSubregToReg() local
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D | EarlyIfConversion.cpp | 462 unsigned DstReg = PI.PHI->getOperand(0).getReg(); in replacePHIInstrs() local 483 unsigned DstReg = MRI->createVirtualRegister(MRI->getRegClass(PHIDst)); in rewritePHIOperands() local
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D | PeepholeOptimizer.cpp | 150 unsigned SrcReg, DstReg, SubIdx; in INITIALIZE_PASS_DEPENDENCY() local
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D | RegisterCoalescer.cpp | 736 unsigned DstReg = CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg(); in reMaterializeTrivialDef() local 889 unsigned DstReg, in updateRegDefsUses() 2016 unsigned DstReg = Copy->getOperand(0).getReg(); in isLocalCopy() local
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D | MachineSink.cpp | 129 unsigned DstReg = MI->getOperand(0).getReg(); in INITIALIZE_PASS_DEPENDENCY() local
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/external/llvm/lib/Target/ARM/ |
D | ARMExpandPseudoInsts.cpp | 388 unsigned DstReg = MI.getOperand(OpIdx++).getReg(); in ExpandVLD() local 516 unsigned DstReg = 0; in ExpandLaneOp() local 617 unsigned DstReg = MI.getOperand(0).getReg(); in ExpandMOV32BitImm() local 865 unsigned DstReg = MI.getOperand(0).getReg(); in ExpandMI() local 889 unsigned DstReg = MI.getOperand(0).getReg(); in ExpandMI() local 949 unsigned DstReg = MI.getOperand(OpIdx++).getReg(); in ExpandMI() local
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D | Thumb2ITBlockPass.cpp | 117 unsigned DstReg = MI->getOperand(0).getReg(); in MoveCopyOutOfITBlock() local
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D | MLxExpansionPass.cpp | 274 unsigned DstReg = MI->getOperand(0).getReg(); in ExpandFPMLxInstruction() local
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/external/llvm/lib/Target/MSP430/ |
D | MSP430RegisterInfo.cpp | 143 unsigned DstReg = MI.getOperand(0).getReg(); in eliminateFrameIndex() local
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/external/llvm/lib/Target/Mips/ |
D | MipsSEInstrInfo.cpp | 334 unsigned DstReg = I->getOperand(0).getReg(); in ExpandExtractElementF64() local 349 unsigned DstReg = I->getOperand(0).getReg(); in ExpandBuildPairF64() local
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D | MipsSEISelDAGToDAG.cpp | 41 unsigned DstReg = 0, ZeroReg = 0; in replaceUsesWithZeroReg() local
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/external/llvm/lib/Target/XCore/ |
D | XCoreRegisterInfo.cpp | 245 unsigned DstReg, int64_t Value, DebugLoc dl) const { in loadConstant()
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D | XCoreFrameLowering.cpp | 47 unsigned DstReg, int Offset, DebugLoc dl, in loadFromStack()
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/external/llvm/include/llvm/Target/ |
D | TargetInstrInfo.h | 114 unsigned &SrcReg, unsigned &DstReg, in isCoalescableExtInstr() 406 unsigned DstReg, in insertSelect()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.cpp | 82 unsigned &SrcReg, unsigned &DstReg, in isCoalescableExtInstr()
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