| /external/llvm/include/llvm/ADT/ |
| D | StringSwitch.h | 85 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases()
91 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases()
97 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases()
104 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases()
|
| /external/clang/test/CXX/temp/temp.spec/temp.expl.spec/ |
| D | p2.cpp | 18 namespace N0 { namespace
49 namespace N0 { namespace
86 namespace N0 { namespace
101 namespace N0 { namespace
112 namespace N0 { namespace
137 namespace N0 { namespace
176 namespace N0 { namespace
208 namespace N0 { namespace
|
| D | p2-0x.cpp | 18 namespace N0 { namespace
48 namespace N0 { namespace
85 namespace N0 { namespace
100 namespace N0 { namespace
111 namespace N0 { namespace
136 namespace N0 { namespace
175 namespace N0 { namespace
207 namespace N0 { namespace
|
| /external/clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct.default/ |
| D | p4.cpp | 11 namespace N0 { namespace
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 570 SDValue N0, N1, N2; in isOneUseSetCC() local
577 SDValue N0, SDValue N1) { in ReassociateOps()
821 SDValue N0 = Op.getOperand(0); in PromoteIntBinOp() local
879 SDValue N0 = Op.getOperand(0); in PromoteIntShiftOp() local
1226 SDValue N0 = N->getOperand(0); in combine() local
1353 SDValue combineShlAddConstant(DebugLoc DL, SDValue N0, SDValue N1, in combineShlAddConstant()
1375 SDValue N0 = N->getOperand(0); in visitADD() local
1545 SDValue N0 = N->getOperand(0); in visitADDC() local
1586 SDValue N0 = N->getOperand(0); in visitADDE() local
1622 SDValue N0 = N->getOperand(0); in visitSUB() local
[all …]
|
| D | InstrEmitter.cpp | 513 SDValue N0 = Node->getOperand(0); in EmitSubregNode() local
|
| D | TargetLowering.cpp | 1067 TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1, in SimplifySetCC()
|
| /external/clang/test/CXX/basic/basic.lookup/basic.lookup.unqual/ |
| D | p3.cpp | 6 namespace N0 { namespace
|
| /external/clang/test/CXX/temp/temp.arg/temp.arg.type/ |
| D | p2.cpp | 22 namespace N0 { namespace
|
| /external/clang/test/SemaCXX/ |
| D | linkage-spec.cpp | 30 namespace N0 { namespace
|
| /external/llvm/unittests/IR/ |
| D | MDBuilderTest.cpp | 84 MDNode *N0 = MDHelper.createTBAANode("Node", R); in TEST_F() local
|
| /external/bison/src/ |
| D | reduce.c | 67 useful_production (rule_number r, bitset N0) in useful_production()
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 634 SDValue N0 = N.getOperand(0); in MatchWrapper() local
2097 SDValue N0 = Node->getOperand(0); in Select() local
2170 SDValue N0 = Node->getOperand(0); in Select() local
2197 SDValue N0 = Node->getOperand(0); in Select() local
2349 SDValue N0 = Node->getOperand(0); in Select() local
2500 SDValue N0 = Node->getOperand(0); in Select() local
|
| D | X86ISelLowering.cpp | 7253 SDValue N0 = Op.getOperand(0); in LowerINSERT_VECTOR_ELT_SSE4() local
7307 SDValue N0 = Op.getOperand(0); in LowerINSERT_VECTOR_ELT() local
8161 SDValue N0 = Op.getOperand(0); in lowerUINT_TO_FP_vec() local
8177 SDValue N0 = Op.getOperand(0); in LowerUINT_TO_FP() local
8765 SDValue N0 = Op.getOperand(0); in LowerFGETSIGN() local
11455 SDValue N0 = Op.getOperand(0); in LowerSDIV() local
15876 SDValue N0 = N->getOperand(0); in PerformSHLCombine() local
16054 SDValue N0 = N->getOperand(0); in CMPEQCombine() local
16175 SDValue N0 = Narrow->getOperand(0); in WidenMaskArithmetic() local
16247 SDValue N0 = N->getOperand(0); in PerformAndCombine() local
[all …]
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 3607 SDValue N0 = DAG.getNode(ISD::BITCAST, DL, VT8Bit, N->getOperand(0)); in getCTPOP16BitCounts() local
3667 SDValue N0 = DAG.getNode(ARMISD::VREV32, DL, VT16Bit, Counts16); in lowerCTPOP32BitElements() local
5220 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubSExt() local
5231 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubZExt() local
5245 SDNode *N0 = Op.getOperand(0).getNode(); in LowerMUL() local
5344 LowerSDIV_v4i16(SDValue N0, SDValue N1, DebugLoc dl, SelectionDAG &DAG) { in LowerSDIV_v4i16()
5386 SDValue N0 = Op.getOperand(0); in LowerSDIV() local
5421 SDValue N0 = Op.getOperand(0); in LowerUDIV() local
7576 SDValue N0 = N->getOperand(0); in combineSelectAndUseCommutative() local
7593 static SDValue AddCombineToVPADDL(SDNode *N, SDValue N0, SDValue N1, in AddCombineToVPADDL()
[all …]
|
| D | ARMISelDAGToDAG.cpp | 356 SDValue N0 = N->getOperand(0); in PreprocessISelDAG() local
2704 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); in Select() local
|
| /external/clang/test/CodeGenCXX/ |
| D | bitfield.cpp | 9 namespace N0 { namespace
|
| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 607 SDValue N0 = Op.getOperand(0); in isADDADDMUL() local
1360 SDValue N0 = N->getOperand(0); in PerformDAGCombine() local
1397 SDValue N0 = N->getOperand(0); in PerformDAGCombine() local
1436 SDValue N0 = N->getOperand(0); in PerformDAGCombine() local
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelDAGToDAG.cpp | 145 SDValue N0 = N.getOperand(0); in MatchWrapper() local
|
| /external/clang/test/SemaTemplate/ |
| D | instantiate-member-template.cpp | 120 namespace N0 { namespace
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAG.cpp | 856 SDValue N0 = N->getOperand(0); in SelectSelect() local
1600 SDValue N0 = N.getOperand(0); in foldGlobalAddressImpl() local
|
| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineMulDivRem.cpp | 477 Value *N0 = dyn_castFNegVal(Opnd0, IgnoreZeroSign); in visitFMul() local
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 1020 SDValue N0 = N->getOperand(0); in Select() local
|
| /external/llvm/utils/TableGen/ |
| D | CodeGenDAGPatterns.cpp | 2435 const TreePatternNode *N0 = N->getChild(0); in IsNodeBitcast() local
|