/external/llvm/lib/Target/X86/ |
D | X86MCInstLower.cpp | 250 static void LowerSubReg32_Op0(MCInst &OutMI, unsigned NewOpc) { in LowerSubReg32_Op0() 255 static void LowerUnaryToTwoAddr(MCInst &OutMI, unsigned NewOpc) { in LowerUnaryToTwoAddr() 426 unsigned NewOpc; in Lower() local 450 unsigned NewOpc; in Lower() local
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D | X86InstrInfo.cpp | 3388 unsigned NewOpc; in optimizeCompareInstr() local 3876 unsigned NewOpc = 0; in foldMemoryOperandImpl() local 3938 unsigned NewOpc = 0; in foldMemoryOperandImpl() local 4192 unsigned NewOpc; in unfoldMemoryOperand() local
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/external/llvm/lib/Target/ARM/ |
D | Thumb2InstrInfo.cpp | 439 unsigned NewOpc = isSub ? ARM::t2SUBri12 : ARM::t2ADDri12; in rewriteT2FrameIndex() local 473 unsigned NewOpc = Opcode; in rewriteT2FrameIndex() local
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D | ARMLoadStoreOptimizer.cpp | 776 unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode, Mode); in MergeBaseUpdateLSMultiple() local 875 unsigned NewOpc = 0; in MergeBaseUpdateLoadStore() local 1075 DebugLoc dl, unsigned NewOpc, in InsertLDR_STR() 1135 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local 1158 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local 1405 unsigned NewOpc = (isThumb2 ? ARM::t2LDMIA_RET : ARM::LDMIA_RET); in MergeReturnIntoLDM() local 1561 unsigned &NewOpc, unsigned &EvenReg, in CanFormLdStDWord() 1727 unsigned NewOpc = 0; in RescheduleOps() local
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D | ARMExpandPseudoInsts.cpp | 942 unsigned NewOpc = ARM::VLDMDIA; in ExpandMI() local 973 unsigned NewOpc = ARM::VSTMDIA; in ExpandMI() local 1004 unsigned NewOpc = Opcode == ARM::VDUPfqf ? ARM::VDUPLN32q : in ExpandMI() local
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D | Thumb1RegisterInfo.cpp | 462 unsigned NewOpc = convertToNonSPOpcode(Opcode); in rewriteFrameIndex() local
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D | ARMConstantIslandPass.cpp | 1700 unsigned NewOpc = 0; in optimizeThumb2Instructions() local 1754 unsigned NewOpc = 0; in optimizeThumb2Branches() local
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D | ARMISelLowering.cpp | 2448 unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vmulls) in LowerINTRINSIC_WO_CHAIN() local 5247 unsigned NewOpc = 0; in LowerMUL() local 7030 unsigned NewOpc = MI->getOpcode() == ARM::STRi_preidx ? in EmitInstrWithCustomInserter() local 7054 unsigned NewOpc; in EmitInstrWithCustomInserter() local 7397 unsigned NewOpc = convertAddSubFlagsOpcode(MI->getOpcode()); in AdjustInstrPostInstrSelection() local 8633 unsigned NewOpc = 0; in CombineBaseUpdate() local 8752 unsigned NewOpc = 0; in CombineVLDDUP() local
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D | ARMISelDAGToDAG.cpp | 3133 unsigned NewOpc = isThumb ? ARM::t2LDREXD :ARM::LDREXD; in Select() local 3212 unsigned NewOpc = isThumb ? ARM::t2STREXD : ARM::STREXD; in Select() local
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/external/llvm/lib/Target/Mips/ |
D | MipsLongBranch.cpp | 220 unsigned NewOpc = TII->GetOppositeBranchOpc(Br->getOpcode()); in replaceBranch() local
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/external/llvm/lib/CodeGen/ |
D | MachineLICM.cpp | 1255 unsigned NewOpc = in ExtractHoistableLoad() local
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D | TwoAddressInstructionPass.cpp | 1182 unsigned NewOpc = in tryInstructionTransform() local
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/external/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 6829 unsigned NewOpc; in processInstruction() local 7303 unsigned NewOpc; in processInstruction() local 7418 unsigned NewOpc; in processInstruction() local 7457 unsigned NewOpc; in processInstruction() local
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeIntegerTypes.cpp | 353 unsigned NewOpc = N->getOpcode(); in PromoteIntRes_FP_TO_XINT() local
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