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Searched defs:Reg1 (Results 1 – 19 of 19) sorted by relevance

/external/llvm/lib/Target/X86/
DX86InstrBuilder.h115 unsigned Reg1, bool isKill1, in addRegReg()
DX86FastISel.cpp1493 unsigned Reg1 = getRegForValue(Op1); in X86VisitIntrinsicCall() local
/external/llvm/include/llvm/MC/
DMCRegisterInfo.h80 bool contains(unsigned Reg1, unsigned Reg2) const { in contains()
514 uint16_t Reg1; variable
/external/llvm/lib/Target/ARM/InstPrinter/
DARMInstPrinter.cpp1270 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_1); in printVectorListTwo() local
1283 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_2); in printVectorListTwoSpaced() local
1334 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_1); in printVectorListTwoAllLanes() local
1379 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_2); in printVectorListTwoSpacedAllLanes() local
/external/llvm/lib/Target/Mips/
DMips16InstrInfo.cpp266 unsigned Reg1, unsigned Reg2) const { in adjustStackPtrBig()
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp154 unsigned Reg1 = MI->getOperand(1).getReg(); in commuteInstruction() local
/external/llvm/lib/Target/AArch64/InstPrinter/
DAArch64InstPrinter.cpp329 unsigned Reg1 = MI->getOperand(1).getReg(); in printRegExtendOperand() local
/external/llvm/lib/Target/ARM/
DA15SDOptimizer.cpp470 unsigned Reg1, unsigned Reg2) { in createRegSequence()
DThumb2SizeReduction.cpp617 unsigned Reg1 = MI->getOperand(1).getReg(); in ReduceTo2Addr() local
DARMFastISel.cpp2701 unsigned Reg1 = getRegForValue(Src1Value); in SelectShift() local
DARMBaseInstrInfo.cpp2368 unsigned Reg1 = UseMI->getOperand(OpIdx).getReg(); in FoldImmediate() local
DARMISelDAGToDAG.cpp3505 unsigned Reg1 = cast<RegisterSDNode>(V1)->getReg(); in SelectInlineAsm() local
/external/llvm/include/llvm/Target/
DTargetRegisterInfo.h81 bool contains(unsigned Reg1, unsigned Reg2) const { in contains()
/external/llvm/lib/CodeGen/
DTargetInstrInfo.cpp136 unsigned Reg1 = MI->getOperand(Idx1).getReg(); in commuteInstruction() local
DStrongPHIElimination.cpp438 void StrongPHIElimination::unionRegs(unsigned Reg1, unsigned Reg2) { in unionRegs()
DAggressiveAntiDepBreaker.cpp79 unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2) in UnionGroups()
/external/llvm/lib/MC/
DMCDwarf.cpp975 unsigned Reg1 = Instr.getRegister(); in EmitCFIInstruction() local
/external/llvm/utils/TableGen/
DCodeGenRegisters.cpp1149 CodeGenRegister *Reg1 = Registers[i]; in computeComposites() local
/external/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp5216 unsigned Reg1 = Op1->getReg(); in ParseInstruction() local